Commit 28e732dc authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amd/powerplay: correct Vega20 gfxclk readout under DS 



Current implementation cannot report the correct gfxclk under DS.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d2c460e7

drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

+9 −5
Original line number Diff line number Diff line
@@ -2013,15 +2013,19 @@ static int vega20_read_sensor(struct pp_hwmgr *hwmgr, int idx, 
{

	struct vega20_hwmgr *data = (struct vega20_hwmgr *)(hwmgr->backend);

	struct amdgpu_device *adev = hwmgr->adev;

	SmuMetrics_t metrics_table;

	uint32_t val_vid;

	int ret = 0;



	switch (idx) {

	case AMDGPU_PP_SENSOR_GFX_SCLK:

		ret = vega20_get_current_clk_freq(hwmgr,

				PPCLK_GFXCLK,

				(uint32_t *)value);

		if (!ret)

		ret = smum_smc_table_manager(hwmgr, (uint8_t *)&metrics_table,

				TABLE_SMU_METRICS, true);

		PP_ASSERT_WITH_CODE(!ret,

				"Failed to export SMU METRICS table!",

				return ret);



		*((uint32_t *)value) = metrics_table.AverageGfxclkFrequency * 100;

		*size = 4;

		break;

	case AMDGPU_PP_SENSOR_GFX_MCLK:

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