Commit 28c05e42 authored by Andre Przywara's avatar Andre Przywara Committed by Arnd Bergmann
Browse files

arm: dts: calxeda: Basic DT file fixes 

The .dts files for the Calxeda machines are quite old, so carry some
sloppy mistakes that the DT schema checker will complain about.

Fix those issues, they should not have any effect on functionality.

Link: https://lore.kernel.org/r/20200228135106.220620-2-andre.przywara@arm.com


Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent b7e31b63

arch/arm/boot/dts/ecx-2000.dts

+1 −3
Original line number Diff line number Diff line
@@ -13,7 +13,6 @@ 
	compatible = "calxeda,ecx-2000";

	#address-cells = <2>;

	#size-cells = <2>;

	clock-ranges;



	cpus {

		#address-cells = <1>;
@@ -83,8 +82,7 @@ 
		intc: interrupt-controller@fff11000 {

			compatible = "arm,cortex-a15-gic";

			#interrupt-cells = <3>;

			#size-cells = <0>;

			#address-cells = <1>;

			#address-cells = <0>;

			interrupt-controller;

			interrupts = <1 9 0xf04>;

			reg = <0xfff11000 0x1000>,

arch/arm/boot/dts/highbank.dts

+2 −5
Original line number Diff line number Diff line
@@ -13,7 +13,6 @@ 
	compatible = "calxeda,highbank";

	#address-cells = <1>;

	#size-cells = <1>;

	clock-ranges;



	cpus {

		#address-cells = <1>;
@@ -96,7 +95,7 @@ 
		};

	};



	memory {

	memory@0 {

		name = "memory";

		device_type = "memory";

		reg = <0x00000000 0xff900000>;
@@ -128,14 +127,12 @@ 
		intc: interrupt-controller@fff11000 {

			compatible = "arm,cortex-a9-gic";

			#interrupt-cells = <3>;

			#size-cells = <0>;

			#address-cells = <1>;

			interrupt-controller;

			reg = <0xfff11000 0x1000>,

			      <0xfff10100 0x100>;

		};



		L2: l2-cache {

		L2: cache-controller {

			compatible = "arm,pl310-cache";

			reg = <0xfff12000 0x1000>;

			interrupts = <0 70 4>;

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