Commit 28a5c61b authored by Cao Van Dong's avatar Cao Van Dong Committed by Simon Horman
Browse files

arm64: dts: renesas: r8a77990: Add CMT device nodes



This patch adds CMT{0|1|2|3} device nodes for r8a77990 SoC.

Signed-off-by: default avatarCao Van Dong <cv-dong@jinso.co.jp>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 99cb9510
Loading
Loading
Loading
Loading
+70 −0
Original line number Diff line number Diff line
@@ -284,6 +284,76 @@
			status = "disabled";
		};

		cmt0: timer@e60f0000 {
			compatible = "renesas,r8a77990-cmt0",
				     "renesas,rcar-gen3-cmt0";
			reg = <0 0xe60f0000 0 0x1004>;
			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 303>;
			clock-names = "fck";
			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
			resets = <&cpg 303>;
			status = "disabled";
		};

		cmt1: timer@e6130000 {
			compatible = "renesas,r8a77990-cmt1",
				     "renesas,rcar-gen3-cmt1";
			reg = <0 0xe6130000 0 0x1004>;
			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 302>;
			clock-names = "fck";
			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
			resets = <&cpg 302>;
			status = "disabled";
		};

		cmt2: timer@e6140000 {
			compatible = "renesas,r8a77990-cmt1",
				     "renesas,rcar-gen3-cmt1";
			reg = <0 0xe6140000 0 0x1004>;
			interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 301>;
			clock-names = "fck";
			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
			resets = <&cpg 301>;
			status = "disabled";
		};

		cmt3: timer@e6148000 {
			compatible = "renesas,r8a77990-cmt1",
				     "renesas,rcar-gen3-cmt1";
			reg = <0 0xe6148000 0 0x1004>;
			interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 300>;
			clock-names = "fck";
			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
			resets = <&cpg 300>;
			status = "disabled";
		};

		cpg: clock-controller@e6150000 {
			compatible = "renesas,r8a77990-cpg-mssr";
			reg = <0 0xe6150000 0 0x1000>;