Commit 28a30b45 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Convert cdclk to global state 



Let's convert cdclk_state to be a proper global state. That allows
us to use the regular atomic old vs. new state accessor, hopefully
making the code less confusing.

We do have to deal with a few more error cases in case the cdclk
state duplication fails. But so be it.

v2: Fix new plane min_cdclk vs. old crtc min_cdclk check

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200121140353.25997-1-ville.syrjala@linux.intel.com


Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
parent aac97871

drivers/gpu/drm/i915/display/intel_atomic.c

+0 −1
Original line number Diff line number Diff line
@@ -520,7 +520,6 @@ void intel_atomic_state_clear(struct drm_atomic_state *s) 
	state->dpll_set = state->modeset = false;

	state->global_state_changed = false;

	state->active_pipes = 0;

	intel_cdclk_clear_state(state);

}



struct intel_crtc_state *

drivers/gpu/drm/i915/display/intel_atomic_plane.c

+44 −25
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ 


#include "i915_trace.h"

#include "intel_atomic_plane.h"

#include "intel_cdclk.h"

#include "intel_display_types.h"

#include "intel_pm.h"

#include "intel_sprite.h"
@@ -155,45 +156,63 @@ unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state, 
	return cpp * crtc_state->pixel_rate;

}



bool intel_plane_calc_min_cdclk(struct intel_atomic_state *state,

				struct intel_plane *plane)

int intel_plane_calc_min_cdclk(struct intel_atomic_state *state,

			       struct intel_plane *plane,

			       bool *need_cdclk_calc)

{

	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);

	const struct intel_cdclk_state *cdclk_state =

		&dev_priv->cdclk_state;

	const struct intel_plane_state *plane_state =

		intel_atomic_get_new_plane_state(state, plane);

	struct intel_crtc *crtc = to_intel_crtc(plane_state->hw.crtc);

	struct intel_crtc_state *crtc_state;

	const struct intel_cdclk_state *cdclk_state;

	struct intel_crtc_state *new_crtc_state =

		intel_atomic_get_new_crtc_state(state, crtc);

	const struct intel_crtc_state *old_crtc_state =

		intel_atomic_get_old_crtc_state(state, crtc);



	if (!plane_state->uapi.visible || !plane->min_cdclk)

		return false;

		return 0;



	new_crtc_state->min_cdclk[plane->id] =

		plane->min_cdclk(new_crtc_state, plane_state);



	crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

	/*

	 * No need to check against the cdclk state if

	 * the min cdclk for the plane doesn't increase.

	 *

	 * Ie. we only ever increase the cdclk due to plane

	 * requirements. This can reduce back and forth

	 * display blinking due to constant cdclk changes.

	 */

	if (new_crtc_state->min_cdclk[plane->id] <=

	    old_crtc_state->min_cdclk[plane->id])

		return 0;



	crtc_state->min_cdclk[plane->id] =

		plane->min_cdclk(crtc_state, plane_state);

	cdclk_state = intel_atomic_get_cdclk_state(state);

	if (IS_ERR(cdclk_state))

		return PTR_ERR(cdclk_state);



	/*

	 * Does the cdclk need to be bumbed up?

	 * No need to recalculate the cdclk state if

	 * the min cdclk for the pipe doesn't increase.

	 *

	 * Note: we obviously need to be called before the new

	 * cdclk frequency is calculated so state->cdclk.logical

	 * hasn't been populated yet. Hence we look at the old

	 * cdclk state under dev_priv->cdclk.logical. This is

	 * safe as long we hold at least one crtc mutex (which

	 * must be true since we have crtc_state).

	 * Ie. we only ever increase the cdclk due to plane

	 * requirements. This can reduce back and forth

	 * display blinking due to constant cdclk changes.

	 */

	if (crtc_state->min_cdclk[plane->id] > cdclk_state->logical.cdclk) {

	if (new_crtc_state->min_cdclk[plane->id] <=

	    cdclk_state->min_cdclk[crtc->pipe])

		return 0;



	drm_dbg_kms(&dev_priv->drm,

			    "[PLANE:%d:%s] min_cdclk (%d kHz) > logical cdclk (%d kHz)\n",

		    "[PLANE:%d:%s] min cdclk (%d kHz) > [CRTC:%d:%s] min cdclk (%d kHz)\n",

		    plane->base.base.id, plane->base.name,

			    crtc_state->min_cdclk[plane->id],

			    cdclk_state->logical.cdclk);

		return true;

	}

		    new_crtc_state->min_cdclk[plane->id],

		    crtc->base.base.id, crtc->base.name,

		    cdclk_state->min_cdclk[crtc->pipe]);

	*need_cdclk_calc = true;



	return false;

	return 0;

}



static void intel_plane_clear_hw_state(struct intel_plane_state *plane_state)

drivers/gpu/drm/i915/display/intel_atomic_plane.h

+3 −2
Original line number Diff line number Diff line
@@ -46,7 +46,8 @@ int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_stat 
				    struct intel_crtc_state *crtc_state,

				    const struct intel_plane_state *old_plane_state,

				    struct intel_plane_state *plane_state);

bool intel_plane_calc_min_cdclk(struct intel_atomic_state *state,

				struct intel_plane *plane);

int intel_plane_calc_min_cdclk(struct intel_atomic_state *state,

			       struct intel_plane *plane,

			       bool *need_cdclk_calc);



#endif /* __INTEL_ATOMIC_PLANE_H__ */

drivers/gpu/drm/i915/display/intel_audio.c

+30 −9
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ 
#include "i915_drv.h"

#include "intel_atomic.h"

#include "intel_audio.h"

#include "intel_cdclk.h"

#include "intel_display_types.h"

#include "intel_lpe_audio.h"
@@ -809,6 +810,34 @@ void intel_init_audio_hooks(struct drm_i915_private *dev_priv) 
	}

}



static int glk_force_audio_cdclk_commit(struct intel_atomic_state *state,

					bool enable)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_cdclk_state *cdclk_state;

	struct intel_crtc *crtc;

	int ret;



	/* need to hold at least one crtc lock for the global state */

	crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);

	ret = drm_modeset_lock(&crtc->base.mutex, state->base.acquire_ctx);

	if (ret)

		return ret;



	cdclk_state = intel_atomic_get_cdclk_state(state);

	if (IS_ERR(cdclk_state))

		return PTR_ERR(cdclk_state);



	cdclk_state->force_min_cdclk_changed = true;

	cdclk_state->force_min_cdclk = enable ? 2 * 96000 : 0;



	ret = intel_atomic_lock_global_state(&cdclk_state->base);

	if (ret)

		return ret;



	return drm_atomic_commit(&state->base);

}



static void glk_force_audio_cdclk(struct drm_i915_private *dev_priv,

				  bool enable)

{
@@ -824,15 +853,7 @@ static void glk_force_audio_cdclk(struct drm_i915_private *dev_priv, 
	state->acquire_ctx = &ctx;



retry:

	to_intel_atomic_state(state)->cdclk_state.force_min_cdclk_changed = true;

	to_intel_atomic_state(state)->cdclk_state.force_min_cdclk =

		enable ? 2 * 96000 : 0;



	/* Protects dev_priv->cdclk.force_min_cdclk */

	ret = _intel_atomic_lock_global_state(to_intel_atomic_state(state));

	if (!ret)

		ret = drm_atomic_commit(state);



	ret = glk_force_audio_cdclk_commit(to_intel_atomic_state(state), enable);

	if (ret == -EDEADLK) {

		drm_atomic_state_clear(state);

		drm_modeset_backoff(&ctx);

drivers/gpu/drm/i915/display/intel_cdclk.c

+109 −83
Original line number Diff line number Diff line
@@ -1823,37 +1823,6 @@ static bool intel_cdclk_changed(const struct intel_cdclk_config *a, 
		a->voltage_level != b->voltage_level;

}



/**

 * intel_cdclk_clear_state - clear the cdclk state

 * @state: atomic state

 *

 * Clear the cdclk state for ww_mutex backoff.

 */

void intel_cdclk_clear_state(struct intel_atomic_state *state)

{

	memset(&state->cdclk_state, 0, sizeof(state->cdclk_state));

	state->cdclk_state.pipe = INVALID_PIPE;

}



/**

 * intel_cdclk_swap_state - make atomic CDCLK configuration effective

 * @state: atomic state

 *

 * This is the CDCLK version of drm_atomic_helper_swap_state() since the

 * helper does not handle driver-specific global state.

 *

 * Similarly to the atomic helpers this function does a complete swap,

 * i.e. it also puts the old state into @state. This is used by the commit

 * code to determine how CDCLK has changed (for instance did it increase or

 * decrease).

 */

void intel_cdclk_swap_state(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);



	swap(state->cdclk_state, dev_priv->cdclk_state);

}



void intel_dump_cdclk_config(const struct intel_cdclk_config *cdclk_config,

			     const char *context)

{
@@ -1904,15 +1873,23 @@ void 
intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	/* called after intel_cdclk_swap_state()! */

	const struct intel_cdclk_state *old_cdclk_state = &state->cdclk_state;

	const struct intel_cdclk_state *new_cdclk_state = &dev_priv->cdclk_state;

	const struct intel_cdclk_state *old_cdclk_state =

		intel_atomic_get_old_cdclk_state(state);

	const struct intel_cdclk_state *new_cdclk_state =

		intel_atomic_get_new_cdclk_state(state);

	enum pipe pipe = new_cdclk_state->pipe;



	if (!intel_cdclk_changed(&old_cdclk_state->actual,

				 &new_cdclk_state->actual))

		return;



	if (pipe == INVALID_PIPE ||

	    old_cdclk_state->actual.cdclk <= new_cdclk_state->actual.cdclk)

	    old_cdclk_state->actual.cdclk <= new_cdclk_state->actual.cdclk) {

		WARN_ON(!new_cdclk_state->base.changed);



		intel_set_cdclk(dev_priv, &new_cdclk_state->actual, pipe);

	}

}



/**

 * intel_set_cdclk_post_plane_update - Push the CDCLK state to the hardware
@@ -1925,15 +1902,23 @@ void 
intel_set_cdclk_post_plane_update(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	/* called after intel_cdclk_swap_state()! */

	const struct intel_cdclk_state *old_cdclk_state = &state->cdclk_state;

	const struct intel_cdclk_state *new_cdclk_state = &dev_priv->cdclk_state;

	const struct intel_cdclk_state *old_cdclk_state =

		intel_atomic_get_old_cdclk_state(state);

	const struct intel_cdclk_state *new_cdclk_state =

		intel_atomic_get_new_cdclk_state(state);

	enum pipe pipe = new_cdclk_state->pipe;



	if (!intel_cdclk_changed(&old_cdclk_state->actual,

				 &new_cdclk_state->actual))

		return;



	if (pipe != INVALID_PIPE &&

	    old_cdclk_state->actual.cdclk > new_cdclk_state->actual.cdclk)

	    old_cdclk_state->actual.cdclk > new_cdclk_state->actual.cdclk) {

		WARN_ON(!new_cdclk_state->base.changed);



		intel_set_cdclk(dev_priv, &new_cdclk_state->actual, pipe);

	}

}



static int intel_pixel_rate_to_cdclk(const struct intel_crtc_state *crtc_state)

{
@@ -2059,10 +2044,10 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state) 
	return min_cdclk;

}



static int intel_compute_min_cdclk(struct intel_atomic_state *state)

static int intel_compute_min_cdclk(struct intel_cdclk_state *cdclk_state)

{

	struct intel_atomic_state *state = cdclk_state->base.state;

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_cdclk_state *cdclk_state = &state->cdclk_state;

	struct intel_crtc *crtc;

	struct intel_crtc_state *crtc_state;

	int min_cdclk, i;
@@ -2080,7 +2065,7 @@ static int intel_compute_min_cdclk(struct intel_atomic_state *state) 


		cdclk_state->min_cdclk[i] = min_cdclk;



		ret = _intel_atomic_lock_global_state(state);

		ret = intel_atomic_lock_global_state(&cdclk_state->base);

		if (ret)

			return ret;

	}
@@ -2105,10 +2090,10 @@ static int intel_compute_min_cdclk(struct intel_atomic_state *state) 
 * future platforms this code will need to be

 * adjusted.

 */

static int bxt_compute_min_voltage_level(struct intel_atomic_state *state)

static int bxt_compute_min_voltage_level(struct intel_cdclk_state *cdclk_state)

{

	struct intel_atomic_state *state = cdclk_state->base.state;

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_cdclk_state *cdclk_state = &state->cdclk_state;

	struct intel_crtc *crtc;

	struct intel_crtc_state *crtc_state;

	u8 min_voltage_level;
@@ -2128,7 +2113,7 @@ static int bxt_compute_min_voltage_level(struct intel_atomic_state *state) 


		cdclk_state->min_voltage_level[i] = min_voltage_level;



		ret = _intel_atomic_lock_global_state(state);

		ret = intel_atomic_lock_global_state(&cdclk_state->base);

		if (ret)

			return ret;

	}
@@ -2141,13 +2126,13 @@ static int bxt_compute_min_voltage_level(struct intel_atomic_state *state) 
	return min_voltage_level;

}



static int vlv_modeset_calc_cdclk(struct intel_atomic_state *state)

static int vlv_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)

{

	struct intel_atomic_state *state = cdclk_state->base.state;

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_cdclk_state *cdclk_state = &state->cdclk_state;

	int min_cdclk, cdclk;



	min_cdclk = intel_compute_min_cdclk(state);

	min_cdclk = intel_compute_min_cdclk(cdclk_state);

	if (min_cdclk < 0)

		return min_cdclk;
@@ -2170,12 +2155,12 @@ static int vlv_modeset_calc_cdclk(struct intel_atomic_state *state) 
	return 0;

}



static int bdw_modeset_calc_cdclk(struct intel_atomic_state *state)

static int bdw_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)

{

	struct intel_cdclk_state *cdclk_state = &state->cdclk_state;

	struct intel_atomic_state *state = cdclk_state->base.state;

	int min_cdclk, cdclk;



	min_cdclk = intel_compute_min_cdclk(state);

	min_cdclk = intel_compute_min_cdclk(cdclk_state);

	if (min_cdclk < 0)

		return min_cdclk;
@@ -2202,10 +2187,10 @@ static int bdw_modeset_calc_cdclk(struct intel_atomic_state *state) 
	return 0;

}



static int skl_dpll0_vco(struct intel_atomic_state *state)

static int skl_dpll0_vco(struct intel_cdclk_state *cdclk_state)

{

	struct intel_atomic_state *state = cdclk_state->base.state;

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_cdclk_state *cdclk_state = &state->cdclk_state;

	struct intel_crtc *crtc;

	struct intel_crtc_state *crtc_state;

	int vco, i;
@@ -2239,16 +2224,16 @@ static int skl_dpll0_vco(struct intel_atomic_state *state) 
	return vco;

}



static int skl_modeset_calc_cdclk(struct intel_atomic_state *state)

static int skl_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)

{

	struct intel_cdclk_state *cdclk_state = &state->cdclk_state;

	struct intel_atomic_state *state = cdclk_state->base.state;

	int min_cdclk, cdclk, vco;



	min_cdclk = intel_compute_min_cdclk(state);

	min_cdclk = intel_compute_min_cdclk(cdclk_state);

	if (min_cdclk < 0)

		return min_cdclk;



	vco = skl_dpll0_vco(state);

	vco = skl_dpll0_vco(cdclk_state);



	/*

	 * FIXME should also account for plane ratio
@@ -2275,17 +2260,17 @@ static int skl_modeset_calc_cdclk(struct intel_atomic_state *state) 
	return 0;

}



static int bxt_modeset_calc_cdclk(struct intel_atomic_state *state)

static int bxt_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)

{

	struct intel_atomic_state *state = cdclk_state->base.state;

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_cdclk_state *cdclk_state = &state->cdclk_state;

	int min_cdclk, min_voltage_level, cdclk, vco;



	min_cdclk = intel_compute_min_cdclk(state);

	min_cdclk = intel_compute_min_cdclk(cdclk_state);

	if (min_cdclk < 0)

		return min_cdclk;



	min_voltage_level = bxt_compute_min_voltage_level(state);

	min_voltage_level = bxt_compute_min_voltage_level(cdclk_state);

	if (min_voltage_level < 0)

		return min_voltage_level;
@@ -2352,7 +2337,7 @@ static int intel_modeset_all_pipes(struct intel_atomic_state *state) 
	return 0;

}



static int fixed_modeset_calc_cdclk(struct intel_atomic_state *state)

static int fixed_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)

{

	int min_cdclk;
@@ -2361,54 +2346,95 @@ static int fixed_modeset_calc_cdclk(struct intel_atomic_state *state) 
	 * check that the required minimum frequency doesn't exceed

	 * the actual cdclk frequency.

	 */

	min_cdclk = intel_compute_min_cdclk(state);

	min_cdclk = intel_compute_min_cdclk(cdclk_state);

	if (min_cdclk < 0)

		return min_cdclk;



	return 0;

}



static struct intel_global_state *intel_cdclk_duplicate_state(struct intel_global_obj *obj)

{

	struct intel_cdclk_state *cdclk_state;



	cdclk_state = kmemdup(obj->state, sizeof(*cdclk_state), GFP_KERNEL);

	if (!cdclk_state)

		return NULL;



	cdclk_state->force_min_cdclk_changed = false;

	cdclk_state->pipe = INVALID_PIPE;



	return &cdclk_state->base;

}



static void intel_cdclk_destroy_state(struct intel_global_obj *obj,

				      struct intel_global_state *state)

{

	kfree(state);

}



static const struct intel_global_state_funcs intel_cdclk_funcs = {

	.atomic_duplicate_state = intel_cdclk_duplicate_state,

	.atomic_destroy_state = intel_cdclk_destroy_state,

};



struct intel_cdclk_state *

intel_atomic_get_cdclk_state(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_global_state *cdclk_state;



	cdclk_state = intel_atomic_get_global_obj_state(state, &dev_priv->cdclk.obj);

	if (IS_ERR(cdclk_state))

		return ERR_CAST(cdclk_state);



	return to_intel_cdclk_state(cdclk_state);

}



int intel_cdclk_init(struct drm_i915_private *dev_priv)

{

	struct intel_cdclk_state *cdclk_state;



	cdclk_state = kzalloc(sizeof(*cdclk_state), GFP_KERNEL);

	if (!cdclk_state)

		return -ENOMEM;



	intel_atomic_global_obj_init(dev_priv, &dev_priv->cdclk.obj,

				     &cdclk_state->base, &intel_cdclk_funcs);



	return 0;

}



int intel_modeset_calc_cdclk(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	const struct intel_cdclk_state *old_cdclk_state = &dev_priv->cdclk_state;

	struct intel_cdclk_state *new_cdclk_state = &state->cdclk_state;

	const struct intel_cdclk_state *old_cdclk_state;

	struct intel_cdclk_state *new_cdclk_state;

	enum pipe pipe;

	int ret;



	memcpy(new_cdclk_state->min_cdclk, old_cdclk_state->min_cdclk,

	       sizeof(new_cdclk_state->min_cdclk));

	memcpy(new_cdclk_state->min_voltage_level, old_cdclk_state->min_voltage_level,

	       sizeof(new_cdclk_state->min_voltage_level));

	new_cdclk_state = intel_atomic_get_cdclk_state(state);

	if (IS_ERR(new_cdclk_state))

		return PTR_ERR(new_cdclk_state);



	/* keep the current setting */

	if (!new_cdclk_state->force_min_cdclk_changed)

		new_cdclk_state->force_min_cdclk = old_cdclk_state->force_min_cdclk;

	old_cdclk_state = intel_atomic_get_old_cdclk_state(state);



	new_cdclk_state->logical = old_cdclk_state->logical;

	new_cdclk_state->actual = old_cdclk_state->actual;



	ret = dev_priv->display.modeset_calc_cdclk(state);

	ret = dev_priv->display.modeset_calc_cdclk(new_cdclk_state);

	if (ret)

		return ret;



	/*

	 * Writes to dev_priv->cdclk.{actual,logical} must protected

	 * by holding all the crtc mutexes even if we don't end up

	 * touching the hardware

	 */

	if (intel_cdclk_changed(&old_cdclk_state->actual,

				&new_cdclk_state->actual)) {

		/*

		 * Also serialize commits across all crtcs

		 * if the actual hw needs to be poked.

		 */

		ret = _intel_atomic_serialize_global_state(state);

		ret = intel_atomic_serialize_global_state(&new_cdclk_state->base);

		if (ret)

			return ret;

	} else if (intel_cdclk_changed(&old_cdclk_state->logical,

				       &new_cdclk_state->logical)) {

		ret = _intel_atomic_lock_global_state(state);

		ret = intel_atomic_lock_global_state(&new_cdclk_state->base);

		if (ret)

			return ret;

	} else {

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