Merge tag 'topic/dp-quirks-2017-05-31' of... (28904eec) · Commits · 戴 / test

drivers/gpu/drm/drm_dp_helper.c

+83 −0

Original line number	Diff line number	Diff line
		@@ -1208,3 +1208,86 @@ int drm_dp_stop_crc(struct drm_dp_aux *aux)
		return 0;
		}
		EXPORT_SYMBOL(drm_dp_stop_crc);

		struct dpcd_quirk {
		u8 oui[3];
		bool is_branch;
		u32 quirks;
		};

		#define OUI(first, second, third) { (first), (second), (third) }

		static const struct dpcd_quirk dpcd_quirk_list[] = {
		/* Analogix 7737 needs reduced M and N at HBR2 link rates */
		{ OUI(0x00, 0x22, 0xb9), true, BIT(DP_DPCD_QUIRK_LIMITED_M_N) },
		};

		#undef OUI

		/*
		* Get a bit mask of DPCD quirks for the sink/branch device identified by
		* ident. The quirk data is shared but it's up to the drivers to act on the
		* data.
		*
		* For now, only the OUI (first three bytes) is used, but this may be extended
		* to device identification string and hardware/firmware revisions later.
		*/
		static u32
		drm_dp_get_quirks(const struct drm_dp_dpcd_ident *ident, bool is_branch)
		{
		const struct dpcd_quirk *quirk;
		u32 quirks = 0;
		int i;

		for (i = 0; i < ARRAY_SIZE(dpcd_quirk_list); i++) {
		quirk = &dpcd_quirk_list[i];

		if (quirk->is_branch != is_branch)
		continue;

		if (memcmp(quirk->oui, ident->oui, sizeof(ident->oui)) != 0)
		continue;

		quirks \|= quirk->quirks;
		}

		return quirks;
		}

		/**
		* drm_dp_read_desc - read sink/branch descriptor from DPCD
		* @aux: DisplayPort AUX channel
		* @desc: Device decriptor to fill from DPCD
		* @is_branch: true for branch devices, false for sink devices
		*
		* Read DPCD 0x400 (sink) or 0x500 (branch) into @desc. Also debug log the
		* identification.
		*
		* Returns 0 on success or a negative error code on failure.
		*/
		int drm_dp_read_desc(struct drm_dp_aux aux, struct drm_dp_desc desc,
		bool is_branch)
		{
		struct drm_dp_dpcd_ident *ident = &desc->ident;
		unsigned int offset = is_branch ? DP_BRANCH_OUI : DP_SINK_OUI;
		int ret, dev_id_len;

		ret = drm_dp_dpcd_read(aux, offset, ident, sizeof(*ident));
		if (ret < 0)
		return ret;

		desc->quirks = drm_dp_get_quirks(ident, is_branch);

		dev_id_len = strnlen(ident->device_id, sizeof(ident->device_id));

		DRM_DEBUG_KMS("DP %s: OUI %phD dev-ID %pE HW-rev %d.%d SW-rev %d.%d quirks 0x%04x\n",
		is_branch ? "branch" : "sink",
		(int)sizeof(ident->oui), ident->oui,
		dev_id_len, ident->device_id,
		ident->hw_rev >> 4, ident->hw_rev & 0xf,
		ident->sw_major_rev, ident->sw_minor_rev,
		desc->quirks);

		return 0;
		}
		EXPORT_SYMBOL(drm_dp_read_desc);

drivers/gpu/drm/i915/i915_drv.h

+2 −1

Original line number	Diff line number	Diff line
		@@ -562,7 +562,8 @@ struct intel_link_m_n {

		void intel_link_compute_m_n(int bpp, int nlanes,
		int pixel_clock, int link_clock,
		struct intel_link_m_n *m_n);
		struct intel_link_m_n *m_n,
		bool reduce_m_n);

		/* Interface history:
		*

drivers/gpu/drm/i915/intel_display.c

+14 −8

Original line number	Diff line number	Diff line
		@@ -6101,7 +6101,7 @@ retry:
		pipe_config->fdi_lanes = lane;

		intel_link_compute_m_n(pipe_config->pipe_bpp, lane, fdi_dotclock,
		link_bw, &pipe_config->fdi_m_n);
		link_bw, &pipe_config->fdi_m_n, false);

		ret = ironlake_check_fdi_lanes(dev, intel_crtc->pipe, pipe_config);
		if (ret == -EINVAL && pipe_config->pipe_bpp > 6*3) {
		@@ -6277,7 +6277,8 @@ intel_reduce_m_n_ratio(uint32_t num, uint32_t den)
		}

		static void compute_m_n(unsigned int m, unsigned int n,
		uint32_t ret_m, uint32_t ret_n)
		uint32_t ret_m, uint32_t ret_n,
		bool reduce_m_n)
		{
		/*
		* Reduce M/N as much as possible without loss in precision. Several DP
		@@ -6285,10 +6286,12 @@ static void compute_m_n(unsigned int m, unsigned int n,
		* values. The passed in values are more likely to have the least
		* significant bits zero than M after rounding below, so do this first.
		*/
		if (reduce_m_n) {
		while ((m & 1) == 0 && (n & 1) == 0) {
		m >>= 1;
		n >>= 1;
		}
		}

		*ret_n = min_t(unsigned int, roundup_pow_of_two(n), DATA_LINK_N_MAX);
		ret_m = div_u64((uint64_t) m *ret_n, n);
		@@ -6298,16 +6301,19 @@ static void compute_m_n(unsigned int m, unsigned int n,
		void
		intel_link_compute_m_n(int bits_per_pixel, int nlanes,
		int pixel_clock, int link_clock,
		struct intel_link_m_n *m_n)
		struct intel_link_m_n *m_n,
		bool reduce_m_n)
		{
		m_n->tu = 64;

		compute_m_n(bits_per_pixel * pixel_clock,
		link_clock * nlanes * 8,
		&m_n->gmch_m, &m_n->gmch_n);
		&m_n->gmch_m, &m_n->gmch_n,
		reduce_m_n);

		compute_m_n(pixel_clock, link_clock,
		&m_n->link_m, &m_n->link_n);
		&m_n->link_m, &m_n->link_n,
		reduce_m_n);
		}

		static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)

drivers/gpu/drm/i915/intel_dp.c

+10 −35

Original line number	Diff line number	Diff line
		@@ -1507,37 +1507,6 @@ static void intel_dp_print_rates(struct intel_dp *intel_dp)
		DRM_DEBUG_KMS("common rates: %s\n", str);
		}

		bool
		__intel_dp_read_desc(struct intel_dp intel_dp, struct intel_dp_desc desc)
		{
		u32 base = drm_dp_is_branch(intel_dp->dpcd) ? DP_BRANCH_OUI :
		DP_SINK_OUI;

		return drm_dp_dpcd_read(&intel_dp->aux, base, desc, sizeof(*desc)) ==
		sizeof(*desc);
		}

		bool intel_dp_read_desc(struct intel_dp *intel_dp)
		{
		struct intel_dp_desc *desc = &intel_dp->desc;
		bool oui_sup = intel_dp->dpcd[DP_DOWN_STREAM_PORT_COUNT] &
		DP_OUI_SUPPORT;
		int dev_id_len;

		if (!__intel_dp_read_desc(intel_dp, desc))
		return false;

		dev_id_len = strnlen(desc->device_id, sizeof(desc->device_id));
		DRM_DEBUG_KMS("DP %s: OUI %phD%s dev-ID %pE HW-rev %d.%d SW-rev %d.%d\n",
		drm_dp_is_branch(intel_dp->dpcd) ? "branch" : "sink",
		(int)sizeof(desc->oui), desc->oui, oui_sup ? "" : "(NS)",
		dev_id_len, desc->device_id,
		desc->hw_rev >> 4, desc->hw_rev & 0xf,
		desc->sw_major_rev, desc->sw_minor_rev);

		return true;
		}

		static int rate_to_index(int find, const int *rates)
		{
		int i = 0;
		@@ -1624,6 +1593,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
		int common_rates[DP_MAX_SUPPORTED_RATES] = {};
		int common_len;
		uint8_t link_bw, rate_select;
		bool reduce_m_n = drm_dp_has_quirk(&intel_dp->desc,
		DP_DPCD_QUIRK_LIMITED_M_N);

		common_len = intel_dp_common_rates(intel_dp, common_rates);

		@@ -1753,7 +1724,8 @@ found:
		intel_link_compute_m_n(bpp, lane_count,
		adjusted_mode->crtc_clock,
		pipe_config->port_clock,
		&pipe_config->dp_m_n);
		&pipe_config->dp_m_n,
		reduce_m_n);

		if (intel_connector->panel.downclock_mode != NULL &&
		dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
		@@ -1761,7 +1733,8 @@ found:
		intel_link_compute_m_n(bpp, lane_count,
		intel_connector->panel.downclock_mode->clock,
		pipe_config->port_clock,
		&pipe_config->dp_m2_n2);
		&pipe_config->dp_m2_n2,
		reduce_m_n);
		}

		/*
		@@ -3622,7 +3595,8 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
		if (!intel_dp_read_dpcd(intel_dp))
		return false;

		intel_dp_read_desc(intel_dp);
		drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc,
		drm_dp_is_branch(intel_dp->dpcd));

		if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11)
		dev_priv->no_aux_handshake = intel_dp->dpcd[DP_MAX_DOWNSPREAD] &
		@@ -4624,7 +4598,8 @@ intel_dp_long_pulse(struct intel_connector *intel_connector)

		intel_dp_print_rates(intel_dp);

		intel_dp_read_desc(intel_dp);
		drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc,
		drm_dp_is_branch(intel_dp->dpcd));

		intel_dp_configure_mst(intel_dp);

drivers/gpu/drm/i915/intel_dp_mst.c

+4 −1

Original line number	Diff line number	Diff line
		@@ -44,6 +44,8 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
		int lane_count, slots;
		const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
		int mst_pbn;
		bool reduce_m_n = drm_dp_has_quirk(&intel_dp->desc,
		DP_DPCD_QUIRK_LIMITED_M_N);

		pipe_config->has_pch_encoder = false;
		bpp = 24;
		@@ -75,7 +77,8 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
		intel_link_compute_m_n(bpp, lane_count,
		adjusted_mode->crtc_clock,
		pipe_config->port_clock,
		&pipe_config->dp_m_n);
		&pipe_config->dp_m_n,
		reduce_m_n);

		pipe_config->dp_m_n.tu = slots;

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