Commit 288fb7ff authored by Alexandre Belloni's avatar Alexandre Belloni
Browse files

ARM: at91/dt: sama5d3: use slow clock where necessary 



The watchdog, the reset controller, the RTC, the shutdown controller, the
timer counters and the LCD PWM need the slow clock, add it where necessary.

[boris.brezillon@free-electrons.com: add tcb clocks]
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
parent 39c64915

arch/arm/boot/dts/sama5d3.dtsi

+6 −2
Original line number Diff line number Diff line
@@ -145,8 +145,8 @@ 
				compatible = "atmel,at91sam9x5-tcb";

				reg = <0xf0010000 0x100>;

				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;

				clocks = <&tcb0_clk>;

				clock-names = "t0_clk";

				clocks = <&tcb0_clk>, <&clk32k>;

				clock-names = "t0_clk", "slow_clk";

			};



			i2c0: i2c@f0014000 {
@@ -1261,11 +1261,13 @@ 
			rstc@fffffe00 {

				compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";

				reg = <0xfffffe00 0x10>;

				clocks = <&clk32k>;

			};



			shutdown-controller@fffffe10 {

				compatible = "atmel,at91sam9x5-shdwc";

				reg = <0xfffffe10 0x10>;

				clocks = <&clk32k>;

			};



			pit: timer@fffffe30 {
@@ -1279,6 +1281,7 @@ 
				compatible = "atmel,at91sam9260-wdt";

				reg = <0xfffffe40 0x10>;

				interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;

				clocks = <&clk32k>;

				atmel,watchdog-type = "hardware";

				atmel,reset-type = "all";

				atmel,dbg-halt;
@@ -1315,6 +1318,7 @@ 
				compatible = "atmel,at91rm9200-rtc";

				reg = <0xfffffeb0 0x30>;

				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;

				clocks = <&clk32k>;

			};

		};

arch/arm/boot/dts/sama5d3_tcb1.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -31,8 +31,8 @@ 
				compatible = "atmel,at91sam9x5-tcb";

				reg = <0xf8014000 0x100>;

				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;

				clocks = <&tcb1_clk>;

				clock-names = "t0_clk";

				clocks = <&tcb1_clk>, <&clk32k>;

				clock-names = "t0_clk", "slow_clk";

			};

		};

	};

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