Commit 284dec43 authored by Christian König's avatar Christian König Committed by Alex Deucher
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drm/amdgpu: enable GTT PD/PT for raven v3



Should work on Vega10 as well, but with an obvious performance hit.

Older APUs can be enabled as well, but will probably be more work.

v2: fix error checking
v3: use more general check

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Acked-by: default avatarAndrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 24a8d289
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+13 −1
Original line number Diff line number Diff line
@@ -342,6 +342,9 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
			list_move(&bo_base->vm_status, &vm->moved);
			spin_unlock(&vm->moved_lock);
		} else {
			r = amdgpu_ttm_alloc_gart(&bo->tbo);
			if (r)
				break;
			list_move(&bo_base->vm_status, &vm->relocated);
		}
	}
@@ -417,6 +420,10 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
	if (r)
		goto error;

	r = amdgpu_ttm_alloc_gart(&bo->tbo);
	if (r)
		return r;

	r = amdgpu_job_alloc_with_ib(adev, 64, &job);
	if (r)
		goto error;
@@ -482,7 +489,12 @@ static void amdgpu_vm_bo_param(struct amdgpu_device *adev, struct amdgpu_vm *vm,
	bp->size = amdgpu_vm_bo_size(adev, level);
	bp->byte_align = AMDGPU_GPU_PAGE_SIZE;
	bp->domain = AMDGPU_GEM_DOMAIN_VRAM;
	bp->flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
	if (bp->size <= PAGE_SIZE && adev->asic_type >= CHIP_VEGA10 &&
	    adev->flags & AMD_IS_APU)
		bp->domain |= AMDGPU_GEM_DOMAIN_GTT;
	bp->domain = amdgpu_bo_get_preferred_pin_domain(adev, bp->domain);
	bp->flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
		AMDGPU_GEM_CREATE_CPU_GTT_USWC;
	if (vm->use_cpu_for_update)
		bp->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
	else