Commit 2845f6ec authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by Eduardo Valentin
Browse files

thermal: exynos: remove exynos_tmu_data.h include 



There is no longer need to share defines between exynos_tmu.c
and exynos_tmu_data.c (as they are now only used by the former
file) so move them accordingly.  Then move externs for struct
exynos_tmu_init_data instances to exynos_tmu.h and remove no
longer needed exynos_tmu_data.h include.

There should be no functional changes caused by this patch.

Cc: Amit Daniel Kachhap <amit.daniel@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Tested-by: default avatarLukasz Majewski <l.majewski@samsung.com>
Signed-off-by: default avatarEduardo Valentin <edubezval@gmail.com>
parent 78f3320d

drivers/thermal/samsung/exynos_tmu.c

+81 −1
Original line number Diff line number Diff line
@@ -33,7 +33,87 @@ 


#include "exynos_thermal_common.h"

#include "exynos_tmu.h"

#include "exynos_tmu_data.h"



/* Exynos generic registers */

#define EXYNOS_TMU_REG_TRIMINFO		0x0

#define EXYNOS_TMU_REG_CONTROL		0x20

#define EXYNOS_TMU_REG_STATUS		0x28

#define EXYNOS_TMU_REG_CURRENT_TEMP	0x40

#define EXYNOS_TMU_REG_INTEN		0x70

#define EXYNOS_TMU_REG_INTSTAT		0x74

#define EXYNOS_TMU_REG_INTCLEAR		0x78



#define EXYNOS_TMU_TEMP_MASK		0xff

#define EXYNOS_TMU_REF_VOLTAGE_SHIFT	24

#define EXYNOS_TMU_REF_VOLTAGE_MASK	0x1f

#define EXYNOS_TMU_BUF_SLOPE_SEL_MASK	0xf

#define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT	8

#define EXYNOS_TMU_CORE_EN_SHIFT	0



/* Exynos3250 specific registers */

#define EXYNOS_TMU_TRIMINFO_CON1	0x10



/* Exynos4210 specific registers */

#define EXYNOS4210_TMU_REG_THRESHOLD_TEMP	0x44

#define EXYNOS4210_TMU_REG_TRIG_LEVEL0	0x50



/* Exynos5250, Exynos4412, Exynos3250 specific registers */

#define EXYNOS_TMU_TRIMINFO_CON2	0x14

#define EXYNOS_THD_TEMP_RISE		0x50

#define EXYNOS_THD_TEMP_FALL		0x54

#define EXYNOS_EMUL_CON		0x80



#define EXYNOS_TRIMINFO_RELOAD_ENABLE	1

#define EXYNOS_TRIMINFO_25_SHIFT	0

#define EXYNOS_TRIMINFO_85_SHIFT	8

#define EXYNOS_TMU_TRIP_MODE_SHIFT	13

#define EXYNOS_TMU_TRIP_MODE_MASK	0x7

#define EXYNOS_TMU_THERM_TRIP_EN_SHIFT	12



#define EXYNOS_TMU_INTEN_RISE0_SHIFT	0

#define EXYNOS_TMU_INTEN_RISE1_SHIFT	4

#define EXYNOS_TMU_INTEN_RISE2_SHIFT	8

#define EXYNOS_TMU_INTEN_RISE3_SHIFT	12

#define EXYNOS_TMU_INTEN_FALL0_SHIFT	16



#define EXYNOS_EMUL_TIME	0x57F0

#define EXYNOS_EMUL_TIME_MASK	0xffff

#define EXYNOS_EMUL_TIME_SHIFT	16

#define EXYNOS_EMUL_DATA_SHIFT	8

#define EXYNOS_EMUL_DATA_MASK	0xFF

#define EXYNOS_EMUL_ENABLE	0x1



/* Exynos5260 specific */

#define EXYNOS5260_TMU_REG_INTEN		0xC0

#define EXYNOS5260_TMU_REG_INTSTAT		0xC4

#define EXYNOS5260_TMU_REG_INTCLEAR		0xC8

#define EXYNOS5260_EMUL_CON			0x100



/* Exynos4412 specific */

#define EXYNOS4412_MUX_ADDR_VALUE          6

#define EXYNOS4412_MUX_ADDR_SHIFT          20



/*exynos5440 specific registers*/

#define EXYNOS5440_TMU_S0_7_TRIM		0x000

#define EXYNOS5440_TMU_S0_7_CTRL		0x020

#define EXYNOS5440_TMU_S0_7_DEBUG		0x040

#define EXYNOS5440_TMU_S0_7_TEMP		0x0f0

#define EXYNOS5440_TMU_S0_7_TH0			0x110

#define EXYNOS5440_TMU_S0_7_TH1			0x130

#define EXYNOS5440_TMU_S0_7_TH2			0x150

#define EXYNOS5440_TMU_S0_7_IRQEN		0x210

#define EXYNOS5440_TMU_S0_7_IRQ			0x230

/* exynos5440 common registers */

#define EXYNOS5440_TMU_IRQ_STATUS		0x000

#define EXYNOS5440_TMU_PMIN			0x004



#define EXYNOS5440_TMU_INTEN_RISE0_SHIFT	0

#define EXYNOS5440_TMU_INTEN_RISE1_SHIFT	1

#define EXYNOS5440_TMU_INTEN_RISE2_SHIFT	2

#define EXYNOS5440_TMU_INTEN_RISE3_SHIFT	3

#define EXYNOS5440_TMU_INTEN_FALL0_SHIFT	4

#define EXYNOS5440_TMU_TH_RISE4_SHIFT		24

#define EXYNOS5440_EFUSE_SWAP_OFFSET		8



/**

 * struct exynos_tmu_data : A structure to hold the private data of the TMU

drivers/thermal/samsung/exynos_tmu.h

+8 −0
Original line number Diff line number Diff line
@@ -133,4 +133,12 @@ struct exynos_tmu_init_data { 
	struct exynos_tmu_platform_data tmu_data[];

};



extern struct exynos_tmu_init_data const exynos3250_default_tmu_data;

extern struct exynos_tmu_init_data const exynos4210_default_tmu_data;

extern struct exynos_tmu_init_data const exynos4412_default_tmu_data;

extern struct exynos_tmu_init_data const exynos5250_default_tmu_data;

extern struct exynos_tmu_init_data const exynos5260_default_tmu_data;

extern struct exynos_tmu_init_data const exynos5420_default_tmu_data;

extern struct exynos_tmu_init_data const exynos5440_default_tmu_data;



#endif /* _EXYNOS_TMU_H */

drivers/thermal/samsung/exynos_tmu_data.c

+0 −1
Original line number Diff line number Diff line
@@ -22,7 +22,6 @@ 


#include "exynos_thermal_common.h"

#include "exynos_tmu.h"

#include "exynos_tmu_data.h"



struct exynos_tmu_init_data const exynos4210_default_tmu_data = {

	.tmu_data = {

drivers/thermal/samsung/exynos_tmu_data.h

deleted100644 → 0
+0 −115
Original line number Diff line number Diff line 
/*

 * exynos_tmu_data.h - Samsung EXYNOS tmu data header file

 *

 *  Copyright (C) 2013 Samsung Electronics

 *  Amit Daniel Kachhap <amit.daniel@samsung.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

 *

 */



#ifndef _EXYNOS_TMU_DATA_H

#define _EXYNOS_TMU_DATA_H



/* Exynos generic registers */

#define EXYNOS_TMU_REG_TRIMINFO		0x0

#define EXYNOS_TMU_REG_CONTROL		0x20

#define EXYNOS_TMU_REG_STATUS		0x28

#define EXYNOS_TMU_REG_CURRENT_TEMP	0x40

#define EXYNOS_TMU_REG_INTEN		0x70

#define EXYNOS_TMU_REG_INTSTAT		0x74

#define EXYNOS_TMU_REG_INTCLEAR		0x78



#define EXYNOS_TMU_TEMP_MASK		0xff

#define EXYNOS_TMU_REF_VOLTAGE_SHIFT	24

#define EXYNOS_TMU_REF_VOLTAGE_MASK	0x1f

#define EXYNOS_TMU_BUF_SLOPE_SEL_MASK	0xf

#define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT	8

#define EXYNOS_TMU_CORE_EN_SHIFT	0



/* Exynos3250 specific registers */

#define EXYNOS_TMU_TRIMINFO_CON1	0x10



/* Exynos4210 specific registers */

#define EXYNOS4210_TMU_REG_THRESHOLD_TEMP	0x44

#define EXYNOS4210_TMU_REG_TRIG_LEVEL0	0x50



/* Exynos5250, Exynos4412, Exynos3250 specific registers */

#define EXYNOS_TMU_TRIMINFO_CON2	0x14

#define EXYNOS_THD_TEMP_RISE		0x50

#define EXYNOS_THD_TEMP_FALL		0x54

#define EXYNOS_EMUL_CON		0x80



#define EXYNOS_TRIMINFO_RELOAD_ENABLE	1

#define EXYNOS_TRIMINFO_25_SHIFT	0

#define EXYNOS_TRIMINFO_85_SHIFT	8

#define EXYNOS_TMU_TRIP_MODE_SHIFT	13

#define EXYNOS_TMU_TRIP_MODE_MASK	0x7

#define EXYNOS_TMU_THERM_TRIP_EN_SHIFT	12



#define EXYNOS_TMU_INTEN_RISE0_SHIFT	0

#define EXYNOS_TMU_INTEN_RISE1_SHIFT	4

#define EXYNOS_TMU_INTEN_RISE2_SHIFT	8

#define EXYNOS_TMU_INTEN_RISE3_SHIFT	12

#define EXYNOS_TMU_INTEN_FALL0_SHIFT	16



#define EXYNOS_EMUL_TIME	0x57F0

#define EXYNOS_EMUL_TIME_MASK	0xffff

#define EXYNOS_EMUL_TIME_SHIFT	16

#define EXYNOS_EMUL_DATA_SHIFT	8

#define EXYNOS_EMUL_DATA_MASK	0xFF

#define EXYNOS_EMUL_ENABLE	0x1



/* Exynos5260 specific */

#define EXYNOS5260_TMU_REG_INTEN		0xC0

#define EXYNOS5260_TMU_REG_INTSTAT		0xC4

#define EXYNOS5260_TMU_REG_INTCLEAR		0xC8

#define EXYNOS5260_EMUL_CON			0x100



/* Exynos4412 specific */

#define EXYNOS4412_MUX_ADDR_VALUE          6

#define EXYNOS4412_MUX_ADDR_SHIFT          20



/*exynos5440 specific registers*/

#define EXYNOS5440_TMU_S0_7_TRIM		0x000

#define EXYNOS5440_TMU_S0_7_CTRL		0x020

#define EXYNOS5440_TMU_S0_7_DEBUG		0x040

#define EXYNOS5440_TMU_S0_7_TEMP		0x0f0

#define EXYNOS5440_TMU_S0_7_TH0			0x110

#define EXYNOS5440_TMU_S0_7_TH1			0x130

#define EXYNOS5440_TMU_S0_7_TH2			0x150

#define EXYNOS5440_TMU_S0_7_IRQEN		0x210

#define EXYNOS5440_TMU_S0_7_IRQ			0x230

/* exynos5440 common registers */

#define EXYNOS5440_TMU_IRQ_STATUS		0x000

#define EXYNOS5440_TMU_PMIN			0x004



#define EXYNOS5440_TMU_INTEN_RISE0_SHIFT	0

#define EXYNOS5440_TMU_INTEN_RISE1_SHIFT	1

#define EXYNOS5440_TMU_INTEN_RISE2_SHIFT	2

#define EXYNOS5440_TMU_INTEN_RISE3_SHIFT	3

#define EXYNOS5440_TMU_INTEN_FALL0_SHIFT	4

#define EXYNOS5440_TMU_TH_RISE4_SHIFT		24

#define EXYNOS5440_EFUSE_SWAP_OFFSET		8



extern struct exynos_tmu_init_data const exynos3250_default_tmu_data;

extern struct exynos_tmu_init_data const exynos4210_default_tmu_data;

extern struct exynos_tmu_init_data const exynos4412_default_tmu_data;

extern struct exynos_tmu_init_data const exynos5250_default_tmu_data;

extern struct exynos_tmu_init_data const exynos5260_default_tmu_data;

extern struct exynos_tmu_init_data const exynos5420_default_tmu_data;

extern struct exynos_tmu_init_data const exynos5440_default_tmu_data;



#endif /*_EXYNOS_TMU_DATA_H*/

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