Commit 283cde69 authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/ttm: rework handling of private mem types 



Instead of keeping a bunch of potentially unused flags, just define
the start for private memory types and remove the rest.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarChunming Zhou <david1.zhou@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5d98d0bc

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h

+6 −6
Original line number Diff line number Diff line
@@ -26,13 +26,13 @@ 


#include "gpu_scheduler.h"



#define AMDGPU_PL_GDS		TTM_PL_PRIV0

#define AMDGPU_PL_GWS		TTM_PL_PRIV1

#define AMDGPU_PL_OA		TTM_PL_PRIV2

#define AMDGPU_PL_GDS		(TTM_PL_PRIV + 0)

#define AMDGPU_PL_GWS		(TTM_PL_PRIV + 1)

#define AMDGPU_PL_OA		(TTM_PL_PRIV + 2)



#define AMDGPU_PL_FLAG_GDS		TTM_PL_FLAG_PRIV0

#define AMDGPU_PL_FLAG_GWS		TTM_PL_FLAG_PRIV1

#define AMDGPU_PL_FLAG_OA		TTM_PL_FLAG_PRIV2

#define AMDGPU_PL_FLAG_GDS		(TTM_PL_FLAG_PRIV << 0)

#define AMDGPU_PL_FLAG_GWS		(TTM_PL_FLAG_PRIV << 1)

#define AMDGPU_PL_FLAG_OA		(TTM_PL_FLAG_PRIV << 2)



#define AMDGPU_TTM_LRU_SIZE	20

drivers/gpu/drm/qxl/qxl_object.c

+4 −4
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ void qxl_ttm_placement_from_domain(struct qxl_bo *qbo, u32 domain, bool pinned) 
	if (domain == QXL_GEM_DOMAIN_VRAM)

		qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_VRAM | pflag;

	if (domain == QXL_GEM_DOMAIN_SURFACE)

		qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_PRIV0 | pflag;

		qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_PRIV | pflag;

	if (domain == QXL_GEM_DOMAIN_CPU)

		qbo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM | pflag;

	if (!c)
@@ -151,7 +151,7 @@ void *qxl_bo_kmap_atomic_page(struct qxl_device *qdev, 


	if (bo->tbo.mem.mem_type == TTM_PL_VRAM)

		map = qdev->vram_mapping;

	else if (bo->tbo.mem.mem_type == TTM_PL_PRIV0)

	else if (bo->tbo.mem.mem_type == TTM_PL_PRIV)

		map = qdev->surface_mapping;

	else

		goto fallback;
@@ -191,7 +191,7 @@ void qxl_bo_kunmap_atomic_page(struct qxl_device *qdev, 


	if (bo->tbo.mem.mem_type == TTM_PL_VRAM)

		map = qdev->vram_mapping;

	else if (bo->tbo.mem.mem_type == TTM_PL_PRIV0)

	else if (bo->tbo.mem.mem_type == TTM_PL_PRIV)

		map = qdev->surface_mapping;

	else

		goto fallback;
@@ -311,7 +311,7 @@ int qxl_bo_check_id(struct qxl_device *qdev, struct qxl_bo *bo) 


int qxl_surf_evict(struct qxl_device *qdev)

{

	return ttm_bo_evict_mm(&qdev->mman.bdev, TTM_PL_PRIV0);

	return ttm_bo_evict_mm(&qdev->mman.bdev, TTM_PL_PRIV);

}



int qxl_vram_evict(struct qxl_device *qdev)

drivers/gpu/drm/qxl/qxl_ttm.c

+6 −6
Original line number Diff line number Diff line
@@ -168,7 +168,7 @@ static int qxl_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, 
		man->default_caching = TTM_PL_FLAG_CACHED;

		break;

	case TTM_PL_VRAM:

	case TTM_PL_PRIV0:

	case TTM_PL_PRIV:

		/* "On-card" video ram */

		man->func = &ttm_bo_manager_func;

		man->gpu_offset = 0;
@@ -235,7 +235,7 @@ static int qxl_ttm_io_mem_reserve(struct ttm_bo_device *bdev, 
		mem->bus.base = qdev->vram_base;

		mem->bus.offset = mem->start << PAGE_SHIFT;

		break;

	case TTM_PL_PRIV0:

	case TTM_PL_PRIV:

		mem->bus.is_iomem = true;

		mem->bus.base = qdev->surfaceram_base;

		mem->bus.offset = mem->start << PAGE_SHIFT;
@@ -376,7 +376,7 @@ static void qxl_bo_move_notify(struct ttm_buffer_object *bo, 
	qbo = to_qxl_bo(bo);

	qdev = qbo->gem_base.dev->dev_private;



	if (bo->mem.mem_type == TTM_PL_PRIV0 && qbo->surface_id)

	if (bo->mem.mem_type == TTM_PL_PRIV && qbo->surface_id)

		qxl_surface_evict(qdev, qbo, new_mem ? true : false);

}
@@ -422,7 +422,7 @@ int qxl_ttm_init(struct qxl_device *qdev) 
		DRM_ERROR("Failed initializing VRAM heap.\n");

		return r;

	}

	r = ttm_bo_init_mm(&qdev->mman.bdev, TTM_PL_PRIV0,

	r = ttm_bo_init_mm(&qdev->mman.bdev, TTM_PL_PRIV,

			   qdev->surfaceram_size / PAGE_SIZE);

	if (r) {

		DRM_ERROR("Failed initializing Surfaces heap.\n");
@@ -445,7 +445,7 @@ int qxl_ttm_init(struct qxl_device *qdev) 
void qxl_ttm_fini(struct qxl_device *qdev)

{

	ttm_bo_clean_mm(&qdev->mman.bdev, TTM_PL_VRAM);

	ttm_bo_clean_mm(&qdev->mman.bdev, TTM_PL_PRIV0);

	ttm_bo_clean_mm(&qdev->mman.bdev, TTM_PL_PRIV);

	ttm_bo_device_release(&qdev->mman.bdev);

	qxl_ttm_global_fini(qdev);

	DRM_INFO("qxl: ttm finalized\n");
@@ -489,7 +489,7 @@ static int qxl_ttm_debugfs_init(struct qxl_device *qdev) 
		if (i == 0)

			qxl_mem_types_list[i].data = qdev->mman.bdev.man[TTM_PL_VRAM].priv;

		else

			qxl_mem_types_list[i].data = qdev->mman.bdev.man[TTM_PL_PRIV0].priv;

			qxl_mem_types_list[i].data = qdev->mman.bdev.man[TTM_PL_PRIV].priv;



	}

	return qxl_debugfs_add_files(qdev, qxl_mem_types_list, i);

drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

+4 −4
Original line number Diff line number Diff line
@@ -67,10 +67,10 @@ 
			VMWGFX_NUM_GB_SURFACE +\

			VMWGFX_NUM_GB_SCREEN_TARGET)



#define VMW_PL_GMR TTM_PL_PRIV0

#define VMW_PL_FLAG_GMR TTM_PL_FLAG_PRIV0

#define VMW_PL_MOB TTM_PL_PRIV1

#define VMW_PL_FLAG_MOB TTM_PL_FLAG_PRIV1

#define VMW_PL_GMR (TTM_PL_PRIV + 0)

#define VMW_PL_FLAG_GMR (TTM_PL_FLAG_PRIV << 0)

#define VMW_PL_MOB (TTM_PL_PRIV + 1)

#define VMW_PL_FLAG_MOB (TTM_PL_FLAG_PRIV << 1)



#define VMW_RES_CONTEXT ttm_driver_type0

#define VMW_RES_SURFACE ttm_driver_type1

include/drm/ttm/ttm_placement.h

+2 −14
Original line number Diff line number Diff line
@@ -37,24 +37,12 @@ 
#define TTM_PL_SYSTEM           0

#define TTM_PL_TT               1

#define TTM_PL_VRAM             2

#define TTM_PL_PRIV0            3

#define TTM_PL_PRIV1            4

#define TTM_PL_PRIV2            5

#define TTM_PL_PRIV3            6

#define TTM_PL_PRIV4            7

#define TTM_PL_PRIV5            8

#define TTM_PL_SWAPPED          15

#define TTM_PL_PRIV             3



#define TTM_PL_FLAG_SYSTEM      (1 << TTM_PL_SYSTEM)

#define TTM_PL_FLAG_TT          (1 << TTM_PL_TT)

#define TTM_PL_FLAG_VRAM        (1 << TTM_PL_VRAM)

#define TTM_PL_FLAG_PRIV0       (1 << TTM_PL_PRIV0)

#define TTM_PL_FLAG_PRIV1       (1 << TTM_PL_PRIV1)

#define TTM_PL_FLAG_PRIV2       (1 << TTM_PL_PRIV2)

#define TTM_PL_FLAG_PRIV3       (1 << TTM_PL_PRIV3)

#define TTM_PL_FLAG_PRIV4       (1 << TTM_PL_PRIV4)

#define TTM_PL_FLAG_PRIV5       (1 << TTM_PL_PRIV5)

#define TTM_PL_FLAG_SWAPPED     (1 << TTM_PL_SWAPPED)

#define TTM_PL_FLAG_PRIV        (1 << TTM_PL_PRIV)

#define TTM_PL_MASK_MEM         0x0000FFFF



/*

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