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This implements support for ioremapping of register windows that encapsulate clock control registers used by a struct clk, with transparent sibling inheritance. Root clocks at the top of a given topology often encapsulate the entire register space of all of their sibling clocks, so this mapping can be done once and handed down. A given clock enable/disable case maps out to a single bit in a shared register, so this prevents creating multiple overlapping mappings. The mapping case breaks down in to a couple of different situations: - Sibling clocks without a specific mapping. - Root clocks without a specific mapping. - Any of sibling/root clocks with a specific mapping. Sibling clocks with no specified mapping will grovel up the clock chain and install the root clock mapping unconditionally at registration time. Root clocks without their own mappings have a dummy BSS-initialized mapping inserted that is handed down the chain just like any other mapping. This permits all of the sibling clock ops to read/write using the mapping offsets without any special configuration, enabling them to not care whether access ultimately goes through translatable or untranslatable memory. Any clock with its own mapping will have the window initialized at registration time and be ready for use by its clock ops. Failure to establish the mapping will prevent registration, so no additional sanity checks are needed. Sibling clocks that double as parents for the moment will not propagate their mapping down, but this is easily tunable if the need arises. All clock mappings are kref refcounted, with each instance of mapping inheritance incrementing the refcount. Tested-by:Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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