Commit 27cf6c02 authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman
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staging: comedi: ni_stc.h: tidy up Analog_Trigger_Etc_Register and bits 



Rename the CamelCase. Use the BIT() macro to define the bits.

Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent aa9d73ba

drivers/staging/comedi/drivers/ni_mio_common.c

+3 −4
Original line number Diff line number Diff line
@@ -356,7 +356,7 @@ static const struct mio_regmap m_series_stc_write_regmap[] = { 
	[NISTC_RTSI_TRIG_DIR_REG]	= { 0x174, 2 },

	[NISTC_INT_CTRL_REG]		= { 0x176, 2 },

	[NISTC_AI_OUT_CTRL_REG]		= { 0x178, 2 },

	[Analog_Trigger_Etc_Register]	= { 0x17a, 2 },

	[NISTC_ATRIG_ETC_REG]		= { 0x17a, 2 },

	[AI_START_STOP_Select_Register]	= { 0x17c, 2 },

	[AI_Trigger_Select_Register]	= { 0x17e, 2 },

	[AI_DIV_Load_A_Register]	= { 0x180, 4 },
@@ -2262,9 +2262,8 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) 


	/* disable analog triggering for now, since it

	 * interferes with the use of pfi0 */

	devpriv->an_trig_etc_reg &= ~Analog_Trigger_Enable;

	ni_stc_writew(dev, devpriv->an_trig_etc_reg,

		      Analog_Trigger_Etc_Register);

	devpriv->an_trig_etc_reg &= ~NISTC_ATRIG_ETC_ENA;

	ni_stc_writew(dev, devpriv->an_trig_etc_reg, NISTC_ATRIG_ETC_REG);



	switch (cmd->start_src) {

	case TRIG_INT:

drivers/staging/comedi/drivers/ni_stc.h

+9 −10
Original line number Diff line number Diff line
@@ -307,6 +307,15 @@ 
#define NISTC_AI_OUT_CTRL_CONVERT_LOW		NISTC_AI_OUT_CTRL_CONVERT_SEL(2)

#define NISTC_AI_OUT_CTRL_CONVERT_HIGH		NISTC_AI_OUT_CTRL_CONVERT_SEL(3)



#define NISTC_ATRIG_ETC_REG		61

#define NISTC_ATRIG_ETC_GPFO_1_ENA	BIT(15)

#define NISTC_ATRIG_ETC_GPFO_0_ENA	BIT(14)

#define NISTC_ATRIG_ETC_GPFO_0_SEL(x)	(((x) & 0x3) << 11)

#define NISTC_ATRIG_ETC_GPFO_1_SEL	BIT(7)

#define NISTC_ATRIG_ETC_DRV		BIT(4)

#define NISTC_ATRIG_ETC_ENA		BIT(3)

#define NISTC_ATRIG_ETC_MODE(x)		(((x) & 0x7) << 0)



#define AI_Status_1_Register		2

#define Interrupt_A_St				0x8000

#define AI_FIFO_Full_St				0x4000
@@ -587,7 +596,6 @@ static unsigned AO_UPDATE_Output_Select(enum ao_update_output_selection 
#define G_Save_Register_High(a)		(12+(a)*2)

#define G_Save_Register_Low(a)		(13+(a)*2)

#define G_Status_Register		4

#define Analog_Trigger_Etc_Register	61



/* command register */

#define G_Disarm_Copy			_bit15	/* strobe */
@@ -657,15 +665,6 @@ static unsigned AO_UPDATE_Output_Select(enum ao_update_output_selection 
/* general purpose counter timer */

#define G_Autoincrement(a)              ((a)<<0)



/*Analog_Trigger_Etc_Register*/

#define Analog_Trigger_Mode(x) ((x) & 0x7)

#define Analog_Trigger_Enable _bit3

#define Analog_Trigger_Drive _bit4

#define GPFO_1_Output_Select		_bit7

#define GPFO_0_Output_Select(a)		((a)<<11)

#define GPFO_0_Output_Enable		_bit14

#define GPFO_1_Output_Enable		_bit15



/* Additional windowed registers unique to E series */



/* 16 bit registers shadowed from DAQ-STC */

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