drm/msm/dpu: Remove dpu_dbg (27bc773a) · Commits · 戴 / test

drivers/gpu/drm/msm/Makefile

+1 −2

Original line number	Diff line number	Diff line
		@@ -95,8 +95,7 @@ msm-y := \
		msm_gpu_tracepoints.o \
		msm_gpummu.o

		msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \
		disp/dpu1/dpu_dbg.o
		msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o

		msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
		msm-$(CONFIG_COMMON_CLK) += disp/mdp4/mdp4_lvds_pll.o

drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c

deleted100644 → 0

+0 −2393

File deleted.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h

deleted100644 → 0

+0 −103

Original line number	Diff line number	Diff line
		/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		* only version 2 as published by the Free Software Foundation.
		*
		* This program is distributed in the hope that it will be useful,
		* but WITHOUT ANY WARRANTY; without even the implied warranty of
		* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		* GNU General Public License for more details.
		*/

		#ifndef DPU_DBG_H_
		#define DPU_DBG_H_

		#include <stdarg.h>
		#include <linux/debugfs.h>
		#include <linux/list.h>

		enum dpu_dbg_dump_flag {
		DPU_DBG_DUMP_IN_LOG = BIT(0),
		DPU_DBG_DUMP_IN_MEM = BIT(1),
		};

		#if defined(CONFIG_DEBUG_FS)

		/**
		* dpu_dbg_init_dbg_buses - initialize debug bus dumping support for the chipset
		* @hwversion: Chipset revision
		*/
		void dpu_dbg_init_dbg_buses(u32 hwversion);

		/**
		* dpu_dbg_init - initialize global dpu debug facilities: regdump
		* @dev: device handle
		* Returns: 0 or -ERROR
		*/
		int dpu_dbg_init(struct device *dev);

		/**
		* dpu_dbg_debugfs_register - register entries at the given debugfs dir
		* @debugfs_root: debugfs root in which to create dpu debug entries
		* Returns: 0 or -ERROR
		*/
		int dpu_dbg_debugfs_register(struct dentry *debugfs_root);

		/**
		* dpu_dbg_destroy - destroy the global dpu debug facilities
		* Returns: none
		*/
		void dpu_dbg_destroy(void);

		/**
		* dpu_dbg_dump - trigger dumping of all dpu_dbg facilities
		* @queue_work: whether to queue the dumping work to the work_struct
		* @name: string indicating origin of dump
		* @dump_dbgbus: dump the dpu debug bus
		* @dump_vbif_rt: dump the vbif rt bus
		* Returns: none
		*/
		void dpu_dbg_dump(bool queue_work, const char *name, bool dump_dbgbus_dpu,
		bool dump_dbgbus_vbif_rt);

		/**
		* dpu_dbg_set_dpu_top_offset - set the target specific offset from mdss base
		* address of the top registers. Used for accessing debug bus controls.
		* @blk_off: offset from mdss base of the top block
		*/
		void dpu_dbg_set_dpu_top_offset(u32 blk_off);

		#else

		static inline void dpu_dbg_init_dbg_buses(u32 hwversion)
		{
		}

		static inline int dpu_dbg_init(struct device *dev)
		{
		return 0;
		}

		static inline int dpu_dbg_debugfs_register(struct dentry *debugfs_root)
		{
		return 0;
		}

		static inline void dpu_dbg_destroy(void)
		{
		}

		static inline void dpu_dbg_dump(bool queue_work, const char *name,
		bool dump_dbgbus_dpu, bool dump_dbgbus_vbif_rt)
		{
		}

		static inline void dpu_dbg_set_dpu_top_offset(u32 blk_off)
		{
		}

		#endif /* defined(CONFIG_DEBUG_FS) */


		#endif /* DPU_DBG_H_ */

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

+1 −3

Original line number	Diff line number	Diff line
		@@ -1517,10 +1517,8 @@ static void dpu_encoder_helper_hw_reset(struct dpu_encoder_phys *phys_enc)
		ctl->idx);

		rc = ctl->ops.reset(ctl);
		if (rc) {
		if (rc)
		DPU_ERROR_ENC(dpu_enc, "ctl %d reset failure\n", ctl->idx);
		dpu_dbg_dump(false, __func__, true, true);
		}

		phys_enc->enable_state = DPU_ENC_ENABLED;
		}

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

+0 −1

Original line number	Diff line number	Diff line
		@@ -243,7 +243,6 @@ static int _dpu_encoder_phys_cmd_handle_ppdone_timeout(
		atomic_read(&phys_enc->pending_kickoff_cnt));

		dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_RDPTR);
		dpu_dbg_dump(false, __func__, true, true);
		}

		atomic_add_unless(&phys_enc->pending_kickoff_cnt, -1, 0);

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