Commit 2791a16c authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter
Browse files

drm/i915: revert a few more watermark commits 

This is a squash of the following commits:

Revert "drm/i915: Drop intel_update_sprite_watermarks"
This reverts commit 47c99438.

Revert "drm/i915/ivb: Move WaCxSRDisabledForSpriteScaling w/a to atomic check"
This reverts commit 7809e5ae.

Revert "drm/i915/skl: Eliminate usage of pipe_wm_parameters from SKL-style WM (v3)"
This reverts commit 3a05f5e2.

With these reverts, SKL finally stops failing every single FBC test
with FIFO underrun error messages. After some brief testing, it also
seems that this commit prevents the machine from completely freezing
when we run igt/kms_fbc_crc (see fd.o #92355).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92355


Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent ded17493

drivers/gpu/drm/i915/i915_drv.h

+4 −0
Original line number Diff line number Diff line
@@ -628,6 +628,10 @@ struct drm_i915_display_funcs { 
			  struct dpll *match_clock,

			  struct dpll *best_clock);

	void (*update_wm)(struct drm_crtc *crtc);

	void (*update_sprite_wm)(struct drm_plane *plane,

				 struct drm_crtc *crtc,

				 uint32_t sprite_width, uint32_t sprite_height,

				 int pixel_size, bool enable, bool scaled);

	int (*modeset_calc_cdclk)(struct drm_atomic_state *state);

	void (*modeset_commit_cdclk)(struct drm_atomic_state *state);

	/* Returns the active state of the crtc, and if the crtc is active,

drivers/gpu/drm/i915/intel_atomic.c

+0 −1
Original line number Diff line number Diff line
@@ -94,7 +94,6 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc) 
	__drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base);



	crtc_state->update_pipe = false;

	crtc_state->disable_lp_wm = false;



	return &crtc_state->base;

}

drivers/gpu/drm/i915/intel_display.c

+12 −32
Original line number Diff line number Diff line
@@ -4774,6 +4774,7 @@ static void intel_post_plane_update(struct intel_crtc *crtc) 
	struct intel_crtc_atomic_commit *atomic = &crtc->atomic;

	struct drm_device *dev = crtc->base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_plane *plane;



	if (atomic->wait_vblank)

		intel_wait_for_vblank(dev, crtc->pipe);
@@ -4792,6 +4793,10 @@ static void intel_post_plane_update(struct intel_crtc *crtc) 
	if (atomic->post_enable_primary)

		intel_post_enable_primary(&crtc->base);



	drm_for_each_plane_mask(plane, dev, atomic->update_sprite_watermarks)

		intel_update_sprite_watermarks(plane, &crtc->base,

					       0, 0, 0, false, false);



	memset(atomic, 0, sizeof(*atomic));

}
@@ -11554,30 +11559,16 @@ retry: 
static bool intel_wm_need_update(struct drm_plane *plane,

				 struct drm_plane_state *state)

{

	struct intel_plane_state *new = to_intel_plane_state(state);

	struct intel_plane_state *cur = to_intel_plane_state(plane->state);



	/* Update watermarks on tiling or size changes. */

	/* Update watermarks on tiling changes. */

	if (!plane->state->fb || !state->fb ||

	    plane->state->fb->modifier[0] != state->fb->modifier[0] ||

	    plane->state->rotation != state->rotation ||

	    drm_rect_width(&new->src) != drm_rect_width(&cur->src) ||

	    drm_rect_height(&new->src) != drm_rect_height(&cur->src) ||

	    drm_rect_width(&new->dst) != drm_rect_width(&cur->dst) ||

	    drm_rect_height(&new->dst) != drm_rect_height(&cur->dst))

	    plane->state->rotation != state->rotation)

		return true;



	return false;

}



static bool needs_scaling(struct intel_plane_state *state)

{

	int src_w = drm_rect_width(&state->src) >> 16;

	int src_h = drm_rect_height(&state->src) >> 16;

	int dst_w = drm_rect_width(&state->dst);

	int dst_h = drm_rect_height(&state->dst);

	if (plane->state->crtc_w != state->crtc_w)

		return true;



	return (src_w != dst_w || src_h != dst_h);

	return false;

}



int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
@@ -11595,6 +11586,7 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state, 
	bool mode_changed = needs_modeset(crtc_state);

	bool was_crtc_enabled = crtc->state->active;

	bool is_crtc_enabled = crtc_state->active;



	bool turn_off, turn_on, visible, was_visible;

	struct drm_framebuffer *fb = plane_state->fb;
@@ -11712,23 +11704,11 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state, 
	case DRM_PLANE_TYPE_CURSOR:

		break;

	case DRM_PLANE_TYPE_OVERLAY:

		/*

		 * WaCxSRDisabledForSpriteScaling:ivb

		 *

		 * cstate->update_wm was already set above, so this flag will

		 * take effect when we commit and program watermarks.

		 */

		if (IS_IVYBRIDGE(dev) &&

		    needs_scaling(to_intel_plane_state(plane_state)) &&

		    !needs_scaling(old_plane_state)) {

			to_intel_crtc_state(crtc_state)->disable_lp_wm = true;

		} else if (turn_off && !mode_changed) {

		if (turn_off && !mode_changed) {

			intel_crtc->atomic.wait_vblank = true;

			intel_crtc->atomic.update_sprite_watermarks |=

				1 << i;

		}



		break;

	}

	return 0;

}

drivers/gpu/drm/i915/intel_drv.h

+6 −3
Original line number Diff line number Diff line
@@ -468,9 +468,6 @@ struct intel_crtc_state { 


	/* w/a for waiting 2 vblanks during crtc enable */

	enum pipe hsw_workaround_pipe;



	/* IVB sprite scaling w/a (WaCxSRDisabledForSpriteScaling:ivb) */

	bool disable_lp_wm;

};



struct vlv_wm_state {
@@ -1399,6 +1396,12 @@ void intel_init_clock_gating(struct drm_device *dev); 
void intel_suspend_hw(struct drm_device *dev);

int ilk_wm_max_level(const struct drm_device *dev);

void intel_update_watermarks(struct drm_crtc *crtc);

void intel_update_sprite_watermarks(struct drm_plane *plane,

				    struct drm_crtc *crtc,

				    uint32_t sprite_width,

				    uint32_t sprite_height,

				    int pixel_size,

				    bool enabled, bool scaled);

void intel_init_pm(struct drm_device *dev);

void intel_pm_setup(struct drm_device *dev);

void intel_gpu_ips_init(struct drm_i915_private *dev_priv);

drivers/gpu/drm/i915/intel_pm.c

+256 −163

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