Commit 278e59a0 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'pci-v4.19-fixes-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/helgaas/pci 

Bjorn writes:
  "PCI fixes:

  - Fix ACPI hotplug issue that causes black screen crash at boot (Mika
    Westerberg)

  - Fix DesignWare "scheduling while atomic" issues (Jisheng Zhang)

  - Add PPC contacts to MAINTAINERS for PCI core error handling (Bjorn
    Helgaas)

  - Sort Mobiveil MAINTAINERS entry (Lorenzo Pieralisi)"

* tag 'pci-v4.19-fixes-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  ACPI / hotplug / PCI: Don't scan for non-hotplug bridges if slot is not bridge
  PCI: dwc: Fix scheduling while atomic issues
  MAINTAINERS: Move mobiveil PCI driver entry where it belongs
  MAINTAINERS: Update PPC contacts for PCI core error handling
parents ad037148 f188b99f

MAINTAINERS

+13 −7
Original line number Diff line number Diff line
@@ -9716,13 +9716,6 @@ Q: http://patchwork.linuxtv.org/project/linux-media/list/ 
S:	Maintained

F:	drivers/media/dvb-frontends/mn88473*



PCI DRIVER FOR MOBIVEIL PCIE IP

M:	Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>

L:	linux-pci@vger.kernel.org

S:	Supported

F:	Documentation/devicetree/bindings/pci/mobiveil-pcie.txt

F:	drivers/pci/controller/pcie-mobiveil.c



MODULE SUPPORT

M:	Jessica Yu <jeyu@kernel.org>

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/jeyu/linux.git modules-next
@@ -11137,6 +11130,13 @@ F: include/uapi/linux/switchtec_ioctl.h 
F:	include/linux/switchtec.h

F:	drivers/ntb/hw/mscc/



PCI DRIVER FOR MOBIVEIL PCIE IP

M:	Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>

L:	linux-pci@vger.kernel.org

S:	Supported

F:	Documentation/devicetree/bindings/pci/mobiveil-pcie.txt

F:	drivers/pci/controller/pcie-mobiveil.c



PCI DRIVER FOR MVEBU (Marvell Armada 370 and Armada XP SOC support)

M:	Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

M:	Jason Cooper <jason@lakedaemon.net>
@@ -11203,8 +11203,14 @@ F: tools/pci/ 


PCI ENHANCED ERROR HANDLING (EEH) FOR POWERPC

M:	Russell Currey <ruscur@russell.cc>

M:	Sam Bobroff <sbobroff@linux.ibm.com>

M:	Oliver O'Halloran <oohall@gmail.com>

L:	linuxppc-dev@lists.ozlabs.org

S:	Supported

F:	Documentation/PCI/pci-error-recovery.txt

F:	drivers/pci/pcie/aer.c

F:	drivers/pci/pcie/dpc.c

F:	drivers/pci/pcie/err.c

F:	Documentation/powerpc/eeh-pci-error-recovery.txt

F:	arch/powerpc/kernel/eeh*.c

F:	arch/powerpc/platforms/*/eeh*.c

drivers/pci/controller/dwc/pcie-designware.c

+4 −4
Original line number Diff line number Diff line
@@ -135,7 +135,7 @@ static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index, 
		if (val & PCIE_ATU_ENABLE)

			return;



		usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);

		mdelay(LINK_WAIT_IATU);

	}

	dev_err(pci->dev, "Outbound iATU is not being enabled\n");

}
@@ -178,7 +178,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type, 
		if (val & PCIE_ATU_ENABLE)

			return;



		usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);

		mdelay(LINK_WAIT_IATU);

	}

	dev_err(pci->dev, "Outbound iATU is not being enabled\n");

}
@@ -236,7 +236,7 @@ static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index, 
		if (val & PCIE_ATU_ENABLE)

			return 0;



		usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);

		mdelay(LINK_WAIT_IATU);

	}

	dev_err(pci->dev, "Inbound iATU is not being enabled\n");
@@ -282,7 +282,7 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar, 
		if (val & PCIE_ATU_ENABLE)

			return 0;



		usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);

		mdelay(LINK_WAIT_IATU);

	}

	dev_err(pci->dev, "Inbound iATU is not being enabled\n");

drivers/pci/controller/dwc/pcie-designware.h

+1 −2
Original line number Diff line number Diff line
@@ -26,8 +26,7 @@ 


/* Parameters for the waiting for iATU enabled routine */

#define LINK_WAIT_MAX_IATU_RETRIES	5

#define LINK_WAIT_IATU_MIN		9000

#define LINK_WAIT_IATU_MAX		10000

#define LINK_WAIT_IATU			9



/* Synopsys-specific PCIe configuration registers */

#define PCIE_PORT_LINK_CONTROL		0x710

drivers/pci/hotplug/acpiphp_glue.c

+6 −5
Original line number Diff line number Diff line
@@ -457,17 +457,18 @@ static void acpiphp_native_scan_bridge(struct pci_dev *bridge) 
/**

 * enable_slot - enable, configure a slot

 * @slot: slot to be enabled

 * @bridge: true if enable is for the whole bridge (not a single slot)

 *

 * This function should be called per *physical slot*,

 * not per each slot object in ACPI namespace.

 */

static void enable_slot(struct acpiphp_slot *slot)

static void enable_slot(struct acpiphp_slot *slot, bool bridge)

{

	struct pci_dev *dev;

	struct pci_bus *bus = slot->bus;

	struct acpiphp_func *func;



	if (bus->self && hotplug_is_native(bus->self)) {

	if (bridge && bus->self && hotplug_is_native(bus->self)) {

		/*

		 * If native hotplug is used, it will take care of hotplug

		 * slot management and resource allocation for hotplug
@@ -701,7 +702,7 @@ static void acpiphp_check_bridge(struct acpiphp_bridge *bridge) 
					trim_stale_devices(dev);



			/* configure all functions */

			enable_slot(slot);

			enable_slot(slot, true);

		} else {

			disable_slot(slot);

		}
@@ -785,7 +786,7 @@ static void hotplug_event(u32 type, struct acpiphp_context *context) 
		if (bridge)

			acpiphp_check_bridge(bridge);

		else if (!(slot->flags & SLOT_IS_GOING_AWAY))

			enable_slot(slot);

			enable_slot(slot, false);



		break;
@@ -973,7 +974,7 @@ int acpiphp_enable_slot(struct acpiphp_slot *slot) 


	/* configure all functions */

	if (!(slot->flags & SLOT_ENABLED))

		enable_slot(slot);

		enable_slot(slot, false);



	pci_unlock_rescan_remove();

	return 0;

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