Commit 27503833 authored Sep 10, 2020 by Wanpeng Li Committed by Paolo Bonzini Sep 28, 2020

KVM: LAPIC: Guarantee the timer is in tsc-deadline mode when setting



Check apic_lvtt_tscdeadline() mode directly instead of apic_lvtt_oneshot()
and apic_lvtt_period() to guarantee the timer is in tsc-deadline mode when
wrmsr MSR_IA32_TSCDEADLINE.

Reviewed-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
Message-Id: <1599731444-3525-3-git-send-email-wanpengli@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

parent a970e9b2

arch/x86/kvm/lapic.c

+1 −2

Original line number	Diff line number	Diff line
		@@ -2198,8 +2198,7 @@ void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data)
		{
		struct kvm_lapic *apic = vcpu->arch.apic;

		if (!kvm_apic_present(vcpu) \|\| apic_lvtt_oneshot(apic) \|\|
		apic_lvtt_period(apic))
		if (!kvm_apic_present(vcpu) \|\| !apic_lvtt_tscdeadline(apic))
		return;

		hrtimer_cancel(&apic->lapic_timer.timer);

Admin message