Commit 2728200f authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915/selftests: Force ordering of context switches 



The parallel switch test has an underlying assumption that its requests
are executed in order of submission, which is only true if the backend
manages to keep up. Ensure the order of execution matches the submission
order by explicit dependencies and so when we wait on the last request,
we know we wait on completion of the entire queue.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Acked-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191016225730.29447-1-chris@chris-wilson.co.uk
parent 5932925a

drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c

+28 −7
Original line number Diff line number Diff line
@@ -169,18 +169,24 @@ static int __live_parallel_switch1(void *data) 
		struct i915_request *rq = NULL;

		int err, n;



		for (n = 0; n < ARRAY_SIZE(arg->ce); n++) {

			i915_request_put(rq);

		err = 0;

		for (n = 0; !err && n < ARRAY_SIZE(arg->ce); n++) {

			struct i915_request *prev = rq;



			rq = i915_request_create(arg->ce[n]);

			if (IS_ERR(rq))

			if (IS_ERR(rq)) {

				i915_request_put(prev);

				return PTR_ERR(rq);

			}



			i915_request_get(rq);

			i915_request_add(rq);

			if (prev) {

				err = i915_request_await_dma_fence(rq, &prev->fence);

				i915_request_put(prev);

			}



		err = 0;

			i915_request_add(rq);

		}

		if (i915_request_wait(rq, 0, HZ / 5) < 0)

			err = -ETIME;

		i915_request_put(rq);
@@ -197,6 +203,7 @@ static int __live_parallel_switch1(void *data) 
static int __live_parallel_switchN(void *data)

{

	struct parallel_switch *arg = data;

	struct i915_request *rq = NULL;

	IGT_TIMEOUT(end_time);

	unsigned long count;

	int n;
@@ -204,17 +211,31 @@ static int __live_parallel_switchN(void *data) 
	count = 0;

	do {

		for (n = 0; n < ARRAY_SIZE(arg->ce); n++) {

			struct i915_request *rq;

			struct i915_request *prev = rq;

			int err = 0;



			rq = i915_request_create(arg->ce[n]);

			if (IS_ERR(rq))

			if (IS_ERR(rq)) {

				i915_request_put(prev);

				return PTR_ERR(rq);

			}



			i915_request_get(rq);

			if (prev) {

				err = i915_request_await_dma_fence(rq, &prev->fence);

				i915_request_put(prev);

			}



			i915_request_add(rq);

			if (err) {

				i915_request_put(rq);

				return err;

			}

		}



		count++;

	} while (!__igt_timeout(end_time, NULL));

	i915_request_put(rq);



	pr_info("%s: %lu switches (many)\n", arg->ce[0]->engine->name, count);

	return 0;

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