Commit 26cec748 authored by Adrian Hunter's avatar Adrian Hunter Committed by Arnaldo Carvalho de Melo
Browse files

perf test x86: Add CET instructions to the new instructions test 



Add to the "x86 instruction decoder - new instructions" test the
following instructions:

	incsspd
	incsspq
	rdsspd
	rdsspq
	saveprevssp
	rstorssp
	wrssd
	wrssq
	wrussd
	wrussq
	setssbsy
	clrssbsy
	endbr32
	endbr64

And the "notrack" prefix for indirect calls and jumps.

For information about the instructions, refer Intel Control-flow
Enforcement Technology Specification May 2019 (334525-003).

Committer testing:

  $ perf test instr
  67: x86 instruction decoder - new instructions            : Ok
  $

Then use verbose mode and check one of those new instructions:

  $ perf test -v instr |& grep saveprevssp
  Decoded ok: f3 0f 01 ea          	saveprevssp
  Decoded ok: f3 0f 01 ea          	saveprevssp
  $

Signed-off-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Acked-by: default avatarMasami Hiramatsu <mhiramat@kernel.org>
Tested-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi v. Shankar <ravi.v.shankar@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: x86@kernel.org
Link: http://lore.kernel.org/lkml/20200204171425.28073-3-yu-cheng.yu@intel.com


Signed-off-by: default avatarYu-cheng Yu <yu-cheng.yu@intel.com>
Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 315a4af8

tools/perf/arch/x86/tests/insn-x86-dat-32.c

+112 −0
Original line number Diff line number Diff line
@@ -2085,6 +2085,118 @@ 
"67 f3 0f 38 f8 1c    \tenqcmds (%si),%bx",},

{{0x67, 0xf3, 0x0f, 0x38, 0xf8, 0x8c, 0x34, 0x12, }, 8, 0, "", "",

"67 f3 0f 38 f8 8c 34 12 \tenqcmds 0x1234(%si),%cx",},

{{0xf3, 0x0f, 0xae, 0xe8, }, 4, 0, "", "",

"f3 0f ae e8          \tincsspd %eax",},

{{0x0f, 0xae, 0x28, }, 3, 0, "", "",

"0f ae 28             \txrstor (%eax)",},

{{0x0f, 0xae, 0x2d, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "",

"0f ae 2d 78 56 34 12 \txrstor 0x12345678",},

{{0x0f, 0xae, 0xac, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",

"0f ae ac c8 78 56 34 12 \txrstor 0x12345678(%eax,%ecx,8)",},

{{0x0f, 0xae, 0xe8, }, 3, 0, "", "",

"0f ae e8             \tlfence ",},

{{0xf3, 0x0f, 0x1e, 0xc8, }, 4, 0, "", "",

"f3 0f 1e c8          \trdsspd %eax",},

{{0xf3, 0x0f, 0x01, 0xea, }, 4, 0, "", "",

"f3 0f 01 ea          \tsaveprevssp ",},

{{0xf3, 0x0f, 0x01, 0x28, }, 4, 0, "", "",

"f3 0f 01 28          \trstorssp (%eax)",},

{{0xf3, 0x0f, 0x01, 0x2d, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",

"f3 0f 01 2d 78 56 34 12 \trstorssp 0x12345678",},

{{0xf3, 0x0f, 0x01, 0xac, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",

"f3 0f 01 ac c8 78 56 34 12 \trstorssp 0x12345678(%eax,%ecx,8)",},

{{0x0f, 0x38, 0xf6, 0x08, }, 4, 0, "", "",

"0f 38 f6 08          \twrssd  %ecx,(%eax)",},

{{0x0f, 0x38, 0xf6, 0x15, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",

"0f 38 f6 15 78 56 34 12 \twrssd  %edx,0x12345678",},

{{0x0f, 0x38, 0xf6, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",

"0f 38 f6 94 c8 78 56 34 12 \twrssd  %edx,0x12345678(%eax,%ecx,8)",},

{{0x66, 0x0f, 0x38, 0xf5, 0x08, }, 5, 0, "", "",

"66 0f 38 f5 08       \twrussd %ecx,(%eax)",},

{{0x66, 0x0f, 0x38, 0xf5, 0x15, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",

"66 0f 38 f5 15 78 56 34 12 \twrussd %edx,0x12345678",},

{{0x66, 0x0f, 0x38, 0xf5, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",

"66 0f 38 f5 94 c8 78 56 34 12 \twrussd %edx,0x12345678(%eax,%ecx,8)",},

{{0xf3, 0x0f, 0x01, 0xe8, }, 4, 0, "", "",

"f3 0f 01 e8          \tsetssbsy ",},

{{0x0f, 0x01, 0xee, }, 3, 0, "", "",

"0f 01 ee             \trdpkru ",},

{{0x0f, 0x01, 0xef, }, 3, 0, "", "",

"0f 01 ef             \twrpkru ",},

{{0xf3, 0x0f, 0xae, 0x30, }, 4, 0, "", "",

"f3 0f ae 30          \tclrssbsy (%eax)",},

{{0xf3, 0x0f, 0xae, 0x35, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",

"f3 0f ae 35 78 56 34 12 \tclrssbsy 0x12345678",},

{{0xf3, 0x0f, 0xae, 0xb4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",

"f3 0f ae b4 c8 78 56 34 12 \tclrssbsy 0x12345678(%eax,%ecx,8)",},

{{0xf3, 0x0f, 0x1e, 0xfb, }, 4, 0, "", "",

"f3 0f 1e fb          \tendbr32 ",},

{{0xf3, 0x0f, 0x1e, 0xfa, }, 4, 0, "", "",

"f3 0f 1e fa          \tendbr64 ",},

{{0xff, 0xd0, }, 2, 0, "call", "indirect",

"ff d0                \tcall   *%eax",},

{{0xff, 0x10, }, 2, 0, "call", "indirect",

"ff 10                \tcall   *(%eax)",},

{{0xff, 0x15, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "call", "indirect",

"ff 15 78 56 34 12    \tcall   *0x12345678",},

{{0xff, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "call", "indirect",

"ff 94 c8 78 56 34 12 \tcall   *0x12345678(%eax,%ecx,8)",},

{{0xf2, 0xff, 0xd0, }, 3, 0, "call", "indirect",

"f2 ff d0             \tbnd call *%eax",},

{{0xf2, 0xff, 0x10, }, 3, 0, "call", "indirect",

"f2 ff 10             \tbnd call *(%eax)",},

{{0xf2, 0xff, 0x15, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "call", "indirect",

"f2 ff 15 78 56 34 12 \tbnd call *0x12345678",},

{{0xf2, 0xff, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "call", "indirect",

"f2 ff 94 c8 78 56 34 12 \tbnd call *0x12345678(%eax,%ecx,8)",},

{{0x3e, 0xff, 0xd0, }, 3, 0, "call", "indirect",

"3e ff d0             \tnotrack call *%eax",},

{{0x3e, 0xff, 0x10, }, 3, 0, "call", "indirect",

"3e ff 10             \tnotrack call *(%eax)",},

{{0x3e, 0xff, 0x15, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "call", "indirect",

"3e ff 15 78 56 34 12 \tnotrack call *0x12345678",},

{{0x3e, 0xff, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "call", "indirect",

"3e ff 94 c8 78 56 34 12 \tnotrack call *0x12345678(%eax,%ecx,8)",},

{{0x3e, 0xf2, 0xff, 0xd0, }, 4, 0, "call", "indirect",

"3e f2 ff d0          \tnotrack bnd call *%eax",},

{{0x3e, 0xf2, 0xff, 0x10, }, 4, 0, "call", "indirect",

"3e f2 ff 10          \tnotrack bnd call *(%eax)",},

{{0x3e, 0xf2, 0xff, 0x15, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "call", "indirect",

"3e f2 ff 15 78 56 34 12 \tnotrack bnd call *0x12345678",},

{{0x3e, 0xf2, 0xff, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "call", "indirect",

"3e f2 ff 94 c8 78 56 34 12 \tnotrack bnd call *0x12345678(%eax,%ecx,8)",},

{{0xff, 0xe0, }, 2, 0, "jmp", "indirect",

"ff e0                \tjmp    *%eax",},

{{0xff, 0x20, }, 2, 0, "jmp", "indirect",

"ff 20                \tjmp    *(%eax)",},

{{0xff, 0x25, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "jmp", "indirect",

"ff 25 78 56 34 12    \tjmp    *0x12345678",},

{{0xff, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "jmp", "indirect",

"ff a4 c8 78 56 34 12 \tjmp    *0x12345678(%eax,%ecx,8)",},

{{0xf2, 0xff, 0xe0, }, 3, 0, "jmp", "indirect",

"f2 ff e0             \tbnd jmp *%eax",},

{{0xf2, 0xff, 0x20, }, 3, 0, "jmp", "indirect",

"f2 ff 20             \tbnd jmp *(%eax)",},

{{0xf2, 0xff, 0x25, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "jmp", "indirect",

"f2 ff 25 78 56 34 12 \tbnd jmp *0x12345678",},

{{0xf2, 0xff, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "jmp", "indirect",

"f2 ff a4 c8 78 56 34 12 \tbnd jmp *0x12345678(%eax,%ecx,8)",},

{{0x3e, 0xff, 0xe0, }, 3, 0, "jmp", "indirect",

"3e ff e0             \tnotrack jmp *%eax",},

{{0x3e, 0xff, 0x20, }, 3, 0, "jmp", "indirect",

"3e ff 20             \tnotrack jmp *(%eax)",},

{{0x3e, 0xff, 0x25, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "jmp", "indirect",

"3e ff 25 78 56 34 12 \tnotrack jmp *0x12345678",},

{{0x3e, 0xff, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "jmp", "indirect",

"3e ff a4 c8 78 56 34 12 \tnotrack jmp *0x12345678(%eax,%ecx,8)",},

{{0x3e, 0xf2, 0xff, 0xe0, }, 4, 0, "jmp", "indirect",

"3e f2 ff e0          \tnotrack bnd jmp *%eax",},

{{0x3e, 0xf2, 0xff, 0x20, }, 4, 0, "jmp", "indirect",

"3e f2 ff 20          \tnotrack bnd jmp *(%eax)",},

{{0x3e, 0xf2, 0xff, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "jmp", "indirect",

"3e f2 ff 25 78 56 34 12 \tnotrack bnd jmp *0x12345678",},

{{0x3e, 0xf2, 0xff, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "jmp", "indirect",

"3e f2 ff a4 c8 78 56 34 12 \tnotrack bnd jmp *0x12345678(%eax,%ecx,8)",},

{{0x0f, 0x01, 0xcf, }, 3, 0, "", "",

"0f 01 cf             \tencls  ",},

{{0x0f, 0x01, 0xd7, }, 3, 0, "", "",

tools/perf/arch/x86/tests/insn-x86-dat-64.c

+196 −0
Original line number Diff line number Diff line
@@ -2263,6 +2263,202 @@ 
"67 f3 0f 38 f8 18    \tenqcmds (%eax),%ebx",},

{{0x67, 0xf3, 0x0f, 0x38, 0xf8, 0x88, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",

"67 f3 0f 38 f8 88 78 56 34 12 \tenqcmds 0x12345678(%eax),%ecx",},

{{0xf3, 0x0f, 0xae, 0xe8, }, 4, 0, "", "",

"f3 0f ae e8          \tincsspd %eax",},

{{0xf3, 0x41, 0x0f, 0xae, 0xe8, }, 5, 0, "", "",

"f3 41 0f ae e8       \tincsspd %r8d",},

{{0xf3, 0x48, 0x0f, 0xae, 0xe8, }, 5, 0, "", "",

"f3 48 0f ae e8       \tincsspq %rax",},

{{0xf3, 0x49, 0x0f, 0xae, 0xe8, }, 5, 0, "", "",

"f3 49 0f ae e8       \tincsspq %r8",},

{{0x0f, 0xae, 0x28, }, 3, 0, "", "",

"0f ae 28             \txrstor (%rax)",},

{{0x41, 0x0f, 0xae, 0x28, }, 4, 0, "", "",

"41 0f ae 28          \txrstor (%r8)",},

{{0x0f, 0xae, 0x2c, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",

"0f ae 2c 25 78 56 34 12 \txrstor 0x12345678",},

{{0x0f, 0xae, 0xac, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",

"0f ae ac c8 78 56 34 12 \txrstor 0x12345678(%rax,%rcx,8)",},

{{0x41, 0x0f, 0xae, 0xac, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",

"41 0f ae ac c8 78 56 34 12 \txrstor 0x12345678(%r8,%rcx,8)",},

{{0x0f, 0xae, 0xe8, }, 3, 0, "", "",

"0f ae e8             \tlfence ",},

{{0xf3, 0x0f, 0x1e, 0xc8, }, 4, 0, "", "",

"f3 0f 1e c8          \trdsspd %eax",},

{{0xf3, 0x41, 0x0f, 0x1e, 0xc8, }, 5, 0, "", "",

"f3 41 0f 1e c8       \trdsspd %r8d",},

{{0xf3, 0x48, 0x0f, 0x1e, 0xc8, }, 5, 0, "", "",

"f3 48 0f 1e c8       \trdsspq %rax",},

{{0xf3, 0x49, 0x0f, 0x1e, 0xc8, }, 5, 0, "", "",

"f3 49 0f 1e c8       \trdsspq %r8",},

{{0xf3, 0x0f, 0x01, 0xea, }, 4, 0, "", "",

"f3 0f 01 ea          \tsaveprevssp ",},

{{0xf3, 0x0f, 0x01, 0x28, }, 4, 0, "", "",

"f3 0f 01 28          \trstorssp (%rax)",},

{{0xf3, 0x41, 0x0f, 0x01, 0x28, }, 5, 0, "", "",

"f3 41 0f 01 28       \trstorssp (%r8)",},

{{0xf3, 0x0f, 0x01, 0x2c, 0x25, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",

"f3 0f 01 2c 25 78 56 34 12 \trstorssp 0x12345678",},

{{0xf3, 0x0f, 0x01, 0xac, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",

"f3 0f 01 ac c8 78 56 34 12 \trstorssp 0x12345678(%rax,%rcx,8)",},

{{0xf3, 0x41, 0x0f, 0x01, 0xac, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",

"f3 41 0f 01 ac c8 78 56 34 12 \trstorssp 0x12345678(%r8,%rcx,8)",},

{{0x0f, 0x38, 0xf6, 0x08, }, 4, 0, "", "",

"0f 38 f6 08          \twrssd  %ecx,(%rax)",},

{{0x41, 0x0f, 0x38, 0xf6, 0x10, }, 5, 0, "", "",

"41 0f 38 f6 10       \twrssd  %edx,(%r8)",},

{{0x0f, 0x38, 0xf6, 0x14, 0x25, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",

"0f 38 f6 14 25 78 56 34 12 \twrssd  %edx,0x12345678",},

{{0x0f, 0x38, 0xf6, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",

"0f 38 f6 94 c8 78 56 34 12 \twrssd  %edx,0x12345678(%rax,%rcx,8)",},

{{0x41, 0x0f, 0x38, 0xf6, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",

"41 0f 38 f6 94 c8 78 56 34 12 \twrssd  %edx,0x12345678(%r8,%rcx,8)",},

{{0x48, 0x0f, 0x38, 0xf6, 0x08, }, 5, 0, "", "",

"48 0f 38 f6 08       \twrssq  %rcx,(%rax)",},

{{0x49, 0x0f, 0x38, 0xf6, 0x10, }, 5, 0, "", "",

"49 0f 38 f6 10       \twrssq  %rdx,(%r8)",},

{{0x48, 0x0f, 0x38, 0xf6, 0x14, 0x25, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",

"48 0f 38 f6 14 25 78 56 34 12 \twrssq  %rdx,0x12345678",},

{{0x48, 0x0f, 0x38, 0xf6, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",

"48 0f 38 f6 94 c8 78 56 34 12 \twrssq  %rdx,0x12345678(%rax,%rcx,8)",},

{{0x49, 0x0f, 0x38, 0xf6, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",

"49 0f 38 f6 94 c8 78 56 34 12 \twrssq  %rdx,0x12345678(%r8,%rcx,8)",},

{{0x66, 0x0f, 0x38, 0xf5, 0x08, }, 5, 0, "", "",

"66 0f 38 f5 08       \twrussd %ecx,(%rax)",},

{{0x66, 0x41, 0x0f, 0x38, 0xf5, 0x10, }, 6, 0, "", "",

"66 41 0f 38 f5 10    \twrussd %edx,(%r8)",},

{{0x66, 0x0f, 0x38, 0xf5, 0x14, 0x25, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",

"66 0f 38 f5 14 25 78 56 34 12 \twrussd %edx,0x12345678",},

{{0x66, 0x0f, 0x38, 0xf5, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",

"66 0f 38 f5 94 c8 78 56 34 12 \twrussd %edx,0x12345678(%rax,%rcx,8)",},

{{0x66, 0x41, 0x0f, 0x38, 0xf5, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",

"66 41 0f 38 f5 94 c8 78 56 34 12 \twrussd %edx,0x12345678(%r8,%rcx,8)",},

{{0x66, 0x48, 0x0f, 0x38, 0xf5, 0x08, }, 6, 0, "", "",

"66 48 0f 38 f5 08    \twrussq %rcx,(%rax)",},

{{0x66, 0x49, 0x0f, 0x38, 0xf5, 0x10, }, 6, 0, "", "",

"66 49 0f 38 f5 10    \twrussq %rdx,(%r8)",},

{{0x66, 0x48, 0x0f, 0x38, 0xf5, 0x14, 0x25, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",

"66 48 0f 38 f5 14 25 78 56 34 12 \twrussq %rdx,0x12345678",},

{{0x66, 0x48, 0x0f, 0x38, 0xf5, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",

"66 48 0f 38 f5 94 c8 78 56 34 12 \twrussq %rdx,0x12345678(%rax,%rcx,8)",},

{{0x66, 0x49, 0x0f, 0x38, 0xf5, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",

"66 49 0f 38 f5 94 c8 78 56 34 12 \twrussq %rdx,0x12345678(%r8,%rcx,8)",},

{{0xf3, 0x0f, 0x01, 0xe8, }, 4, 0, "", "",

"f3 0f 01 e8          \tsetssbsy ",},

{{0x0f, 0x01, 0xee, }, 3, 0, "", "",

"0f 01 ee             \trdpkru ",},

{{0x0f, 0x01, 0xef, }, 3, 0, "", "",

"0f 01 ef             \twrpkru ",},

{{0xf3, 0x0f, 0xae, 0x30, }, 4, 0, "", "",

"f3 0f ae 30          \tclrssbsy (%rax)",},

{{0xf3, 0x41, 0x0f, 0xae, 0x30, }, 5, 0, "", "",

"f3 41 0f ae 30       \tclrssbsy (%r8)",},

{{0xf3, 0x0f, 0xae, 0x34, 0x25, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",

"f3 0f ae 34 25 78 56 34 12 \tclrssbsy 0x12345678",},

{{0xf3, 0x0f, 0xae, 0xb4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",

"f3 0f ae b4 c8 78 56 34 12 \tclrssbsy 0x12345678(%rax,%rcx,8)",},

{{0xf3, 0x41, 0x0f, 0xae, 0xb4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",

"f3 41 0f ae b4 c8 78 56 34 12 \tclrssbsy 0x12345678(%r8,%rcx,8)",},

{{0xf3, 0x0f, 0x1e, 0xfb, }, 4, 0, "", "",

"f3 0f 1e fb          \tendbr32 ",},

{{0xf3, 0x0f, 0x1e, 0xfa, }, 4, 0, "", "",

"f3 0f 1e fa          \tendbr64 ",},

{{0xff, 0xd0, }, 2, 0, "call", "indirect",

"ff d0                \tcallq  *%rax",},

{{0xff, 0x10, }, 2, 0, "call", "indirect",

"ff 10                \tcallq  *(%rax)",},

{{0x41, 0xff, 0x10, }, 3, 0, "call", "indirect",

"41 ff 10             \tcallq  *(%r8)",},

{{0xff, 0x14, 0x25, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "call", "indirect",

"ff 14 25 78 56 34 12 \tcallq  *0x12345678",},

{{0xff, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "call", "indirect",

"ff 94 c8 78 56 34 12 \tcallq  *0x12345678(%rax,%rcx,8)",},

{{0x41, 0xff, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "call", "indirect",

"41 ff 94 c8 78 56 34 12 \tcallq  *0x12345678(%r8,%rcx,8)",},

{{0xf2, 0xff, 0xd0, }, 3, 0, "call", "indirect",

"f2 ff d0             \tbnd callq *%rax",},

{{0xf2, 0xff, 0x10, }, 3, 0, "call", "indirect",

"f2 ff 10             \tbnd callq *(%rax)",},

{{0xf2, 0x41, 0xff, 0x10, }, 4, 0, "call", "indirect",

"f2 41 ff 10          \tbnd callq *(%r8)",},

{{0xf2, 0xff, 0x14, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "call", "indirect",

"f2 ff 14 25 78 56 34 12 \tbnd callq *0x12345678",},

{{0xf2, 0xff, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "call", "indirect",

"f2 ff 94 c8 78 56 34 12 \tbnd callq *0x12345678(%rax,%rcx,8)",},

{{0xf2, 0x41, 0xff, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "call", "indirect",

"f2 41 ff 94 c8 78 56 34 12 \tbnd callq *0x12345678(%r8,%rcx,8)",},

{{0x3e, 0xff, 0xd0, }, 3, 0, "call", "indirect",

"3e ff d0             \tnotrack callq *%rax",},

{{0x3e, 0xff, 0x10, }, 3, 0, "call", "indirect",

"3e ff 10             \tnotrack callq *(%rax)",},

{{0x3e, 0x41, 0xff, 0x10, }, 4, 0, "call", "indirect",

"3e 41 ff 10          \tnotrack callq *(%r8)",},

{{0x3e, 0xff, 0x14, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "call", "indirect",

"3e ff 14 25 78 56 34 12 \tnotrack callq *0x12345678",},

{{0x3e, 0xff, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "call", "indirect",

"3e ff 94 c8 78 56 34 12 \tnotrack callq *0x12345678(%rax,%rcx,8)",},

{{0x3e, 0x41, 0xff, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "call", "indirect",

"3e 41 ff 94 c8 78 56 34 12 \tnotrack callq *0x12345678(%r8,%rcx,8)",},

{{0x3e, 0xf2, 0xff, 0xd0, }, 4, 0, "call", "indirect",

"3e f2 ff d0          \tnotrack bnd callq *%rax",},

{{0x3e, 0xf2, 0xff, 0x10, }, 4, 0, "call", "indirect",

"3e f2 ff 10          \tnotrack bnd callq *(%rax)",},

{{0x3e, 0xf2, 0x41, 0xff, 0x10, }, 5, 0, "call", "indirect",

"3e f2 41 ff 10       \tnotrack bnd callq *(%r8)",},

{{0x3e, 0xf2, 0xff, 0x14, 0x25, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "call", "indirect",

"3e f2 ff 14 25 78 56 34 12 \tnotrack bnd callq *0x12345678",},

{{0x3e, 0xf2, 0xff, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "call", "indirect",

"3e f2 ff 94 c8 78 56 34 12 \tnotrack bnd callq *0x12345678(%rax,%rcx,8)",},

{{0x3e, 0xf2, 0x41, 0xff, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "call", "indirect",

"3e f2 41 ff 94 c8 78 56 34 12 \tnotrack bnd callq *0x12345678(%r8,%rcx,8)",},

{{0xff, 0xe0, }, 2, 0, "jmp", "indirect",

"ff e0                \tjmpq   *%rax",},

{{0xff, 0x20, }, 2, 0, "jmp", "indirect",

"ff 20                \tjmpq   *(%rax)",},

{{0x41, 0xff, 0x20, }, 3, 0, "jmp", "indirect",

"41 ff 20             \tjmpq   *(%r8)",},

{{0xff, 0x24, 0x25, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "jmp", "indirect",

"ff 24 25 78 56 34 12 \tjmpq   *0x12345678",},

{{0xff, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "jmp", "indirect",

"ff a4 c8 78 56 34 12 \tjmpq   *0x12345678(%rax,%rcx,8)",},

{{0x41, 0xff, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "jmp", "indirect",

"41 ff a4 c8 78 56 34 12 \tjmpq   *0x12345678(%r8,%rcx,8)",},

{{0xf2, 0xff, 0xe0, }, 3, 0, "jmp", "indirect",

"f2 ff e0             \tbnd jmpq *%rax",},

{{0xf2, 0xff, 0x20, }, 3, 0, "jmp", "indirect",

"f2 ff 20             \tbnd jmpq *(%rax)",},

{{0xf2, 0x41, 0xff, 0x20, }, 4, 0, "jmp", "indirect",

"f2 41 ff 20          \tbnd jmpq *(%r8)",},

{{0xf2, 0xff, 0x24, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "jmp", "indirect",

"f2 ff 24 25 78 56 34 12 \tbnd jmpq *0x12345678",},

{{0xf2, 0xff, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "jmp", "indirect",

"f2 ff a4 c8 78 56 34 12 \tbnd jmpq *0x12345678(%rax,%rcx,8)",},

{{0xf2, 0x41, 0xff, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "jmp", "indirect",

"f2 41 ff a4 c8 78 56 34 12 \tbnd jmpq *0x12345678(%r8,%rcx,8)",},

{{0x3e, 0xff, 0xe0, }, 3, 0, "jmp", "indirect",

"3e ff e0             \tnotrack jmpq *%rax",},

{{0x3e, 0xff, 0x20, }, 3, 0, "jmp", "indirect",

"3e ff 20             \tnotrack jmpq *(%rax)",},

{{0x3e, 0x41, 0xff, 0x20, }, 4, 0, "jmp", "indirect",

"3e 41 ff 20          \tnotrack jmpq *(%r8)",},

{{0x3e, 0xff, 0x24, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "jmp", "indirect",

"3e ff 24 25 78 56 34 12 \tnotrack jmpq *0x12345678",},

{{0x3e, 0xff, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "jmp", "indirect",

"3e ff a4 c8 78 56 34 12 \tnotrack jmpq *0x12345678(%rax,%rcx,8)",},

{{0x3e, 0x41, 0xff, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "jmp", "indirect",

"3e 41 ff a4 c8 78 56 34 12 \tnotrack jmpq *0x12345678(%r8,%rcx,8)",},

{{0x3e, 0xf2, 0xff, 0xe0, }, 4, 0, "jmp", "indirect",

"3e f2 ff e0          \tnotrack bnd jmpq *%rax",},

{{0x3e, 0xf2, 0xff, 0x20, }, 4, 0, "jmp", "indirect",

"3e f2 ff 20          \tnotrack bnd jmpq *(%rax)",},

{{0x3e, 0xf2, 0x41, 0xff, 0x20, }, 5, 0, "jmp", "indirect",

"3e f2 41 ff 20       \tnotrack bnd jmpq *(%r8)",},

{{0x3e, 0xf2, 0xff, 0x24, 0x25, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "jmp", "indirect",

"3e f2 ff 24 25 78 56 34 12 \tnotrack bnd jmpq *0x12345678",},

{{0x3e, 0xf2, 0xff, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "jmp", "indirect",

"3e f2 ff a4 c8 78 56 34 12 \tnotrack bnd jmpq *0x12345678(%rax,%rcx,8)",},

{{0x3e, 0xf2, 0x41, 0xff, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "jmp", "indirect",

"3e f2 41 ff a4 c8 78 56 34 12 \tnotrack bnd jmpq *0x12345678(%r8,%rcx,8)",},

{{0x0f, 0x01, 0xcf, }, 3, 0, "", "",

"0f 01 cf             \tencls  ",},

{{0x0f, 0x01, 0xd7, }, 3, 0, "", "",

tools/perf/arch/x86/tests/insn-x86-dat-src.c

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