Commit 26c0b26d authored by Brian Masney's avatar Brian Masney Committed by Rob Clark
Browse files

drm/msm/gpu: add ocmem init/cleanup functions



The files a3xx_gpu.c and a4xx_gpu.c have ifdefs for the OCMEM support
that was missing upstream. Add two new functions (adreno_gpu_ocmem_init
and adreno_gpu_ocmem_cleanup) that removes some duplicated code.

Signed-off-by: default avatarBrian Masney <masneyb@onstation.org>
Reviewed-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
Tested-by: Gabriel Francisco <frc.gabrielgmail.com>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 88c1e940
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+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ config DRM_MSM
	depends on OF && COMMON_CLK
	depends on MMU
	depends on INTERCONNECT || !INTERCONNECT
	depends on QCOM_OCMEM || QCOM_OCMEM=n
	select QCOM_MDT_LOADER if ARCH_QCOM
	select REGULATOR
	select DRM_KMS_HELPER
+7 −21
Original line number Diff line number Diff line
@@ -6,10 +6,6 @@
 * Copyright (c) 2014 The Linux Foundation. All rights reserved.
 */

#ifdef CONFIG_MSM_OCMEM
#  include <mach/ocmem.h>
#endif

#include "a3xx_gpu.h"

#define A3XX_INT0_MASK \
@@ -195,9 +191,9 @@ static int a3xx_hw_init(struct msm_gpu *gpu)
		gpu_write(gpu, REG_A3XX_RBBM_GPR0_CTL, 0x00000000);

	/* Set the OCMEM base address for A330, etc */
	if (a3xx_gpu->ocmem_hdl) {
	if (a3xx_gpu->ocmem.hdl) {
		gpu_write(gpu, REG_A3XX_RB_GMEM_BASE_ADDR,
			(unsigned int)(a3xx_gpu->ocmem_base >> 14));
			(unsigned int)(a3xx_gpu->ocmem.base >> 14));
	}

	/* Turn on performance counters: */
@@ -318,10 +314,7 @@ static void a3xx_destroy(struct msm_gpu *gpu)

	adreno_gpu_cleanup(adreno_gpu);

#ifdef CONFIG_MSM_OCMEM
	if (a3xx_gpu->ocmem_base)
		ocmem_free(OCMEM_GRAPHICS, a3xx_gpu->ocmem_hdl);
#endif
	adreno_gpu_ocmem_cleanup(&a3xx_gpu->ocmem);

	kfree(a3xx_gpu);
}
@@ -494,17 +487,10 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)

	/* if needed, allocate gmem: */
	if (adreno_is_a330(adreno_gpu)) {
#ifdef CONFIG_MSM_OCMEM
		/* TODO this is different/missing upstream: */
		struct ocmem_buf *ocmem_hdl =
				ocmem_allocate(OCMEM_GRAPHICS, adreno_gpu->gmem);

		a3xx_gpu->ocmem_hdl = ocmem_hdl;
		a3xx_gpu->ocmem_base = ocmem_hdl->addr;
		adreno_gpu->gmem = ocmem_hdl->len;
		DBG("using %dK of OCMEM at 0x%08x", adreno_gpu->gmem / 1024,
				a3xx_gpu->ocmem_base);
#endif
		ret = adreno_gpu_ocmem_init(&adreno_gpu->base.pdev->dev,
					    adreno_gpu, &a3xx_gpu->ocmem);
		if (ret)
			goto fail;
	}

	if (!gpu->aspace) {
+1 −2
Original line number Diff line number Diff line
@@ -19,8 +19,7 @@ struct a3xx_gpu {
	struct adreno_gpu base;

	/* if OCMEM is used for GMEM: */
	uint32_t ocmem_base;
	void *ocmem_hdl;
	struct adreno_ocmem ocmem;
};
#define to_a3xx_gpu(x) container_of(x, struct a3xx_gpu, base)

+6 −19
Original line number Diff line number Diff line
@@ -2,9 +2,6 @@
/* Copyright (c) 2014 The Linux Foundation. All rights reserved.
 */
#include "a4xx_gpu.h"
#ifdef CONFIG_MSM_OCMEM
#  include <soc/qcom/ocmem.h>
#endif

#define A4XX_INT0_MASK \
	(A4XX_INT0_RBBM_AHB_ERROR |        \
@@ -188,7 +185,7 @@ static int a4xx_hw_init(struct msm_gpu *gpu)
			(1 << 30) | 0xFFFF);

	gpu_write(gpu, REG_A4XX_RB_GMEM_BASE_ADDR,
			(unsigned int)(a4xx_gpu->ocmem_base >> 14));
			(unsigned int)(a4xx_gpu->ocmem.base >> 14));

	/* Turn on performance counters: */
	gpu_write(gpu, REG_A4XX_RBBM_PERFCTR_CTL, 0x01);
@@ -318,10 +315,7 @@ static void a4xx_destroy(struct msm_gpu *gpu)

	adreno_gpu_cleanup(adreno_gpu);

#ifdef CONFIG_MSM_OCMEM
	if (a4xx_gpu->ocmem_base)
		ocmem_free(OCMEM_GRAPHICS, a4xx_gpu->ocmem_hdl);
#endif
	adreno_gpu_ocmem_cleanup(&a4xx_gpu->ocmem);

	kfree(a4xx_gpu);
}
@@ -578,17 +572,10 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)

	/* if needed, allocate gmem: */
	if (adreno_is_a4xx(adreno_gpu)) {
#ifdef CONFIG_MSM_OCMEM
		/* TODO this is different/missing upstream: */
		struct ocmem_buf *ocmem_hdl =
				ocmem_allocate(OCMEM_GRAPHICS, adreno_gpu->gmem);

		a4xx_gpu->ocmem_hdl = ocmem_hdl;
		a4xx_gpu->ocmem_base = ocmem_hdl->addr;
		adreno_gpu->gmem = ocmem_hdl->len;
		DBG("using %dK of OCMEM at 0x%08x", adreno_gpu->gmem / 1024,
				a4xx_gpu->ocmem_base);
#endif
		ret = adreno_gpu_ocmem_init(dev->dev, adreno_gpu,
					    &a4xx_gpu->ocmem);
		if (ret)
			goto fail;
	}

	if (!gpu->aspace) {
+1 −2
Original line number Diff line number Diff line
@@ -16,8 +16,7 @@ struct a4xx_gpu {
	struct adreno_gpu base;

	/* if OCMEM is used for GMEM: */
	uint32_t ocmem_base;
	void *ocmem_hdl;
	struct adreno_ocmem ocmem;
};
#define to_a4xx_gpu(x) container_of(x, struct a4xx_gpu, base)

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