drm: bridge: dw-hdmi: Assert SVSRET before resetting the PHY (2668db37) · Commits · 戴 / test

According to the PHY IP core vendor, the SVSRET signal must be asserted before resetting the PHY. Tests on RK3288 and R-Car Gen3 showed no regression, the change should thus be safe. Signed-off-by:

Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by:

Jose Abreu <joabreu@synopsys.com> Signed-off-by:

Archit Taneja <architt@codeaurora.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-20-laurent.pinchart+renesas@ideasonboard.com

drivers/gpu/drm/bridge/dw-hdmi.c

+5 −5

Original line number	Diff line number	Diff line
		@@ -986,6 +986,10 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon)
		/* gen2 pddq */
		dw_hdmi_phy_gen2_pddq(hdmi, 1);

		/* Leave low power consumption mode by asserting SVSRET. */
		if (hdmi->phy->has_svsret)
		dw_hdmi_phy_enable_svsret(hdmi, 1);

		/* PHY reset. The reset signal is active high on Gen2 PHYs. */
		hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ);
		hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ);
		@@ -1028,10 +1032,6 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon)
		dw_hdmi_phy_gen2_txpwron(hdmi, 1);
		dw_hdmi_phy_gen2_pddq(hdmi, 0);

		/* The DWC MHL and HDMI 2.0 PHYs need the SVSRET signal to be set. */
		if (hdmi->phy->has_svsret)
		dw_hdmi_phy_enable_svsret(hdmi, 1);

		/* Wait for PHY PLL lock */
		msec = 5;
		do {

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