Commit 2659392e authored by Icenowy Zheng's avatar Icenowy Zheng Committed by Kishon Vijay Abraham I
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phy: sun4i-usb: add support for missing USB PHY index



The new Allwinner H6 SoC's USB2 PHY has two holes -- USB1 (which is a
3.0 port with dedicated PHY) and USB2 (which doesn't exist at all).

Add support for this kind of missing USB PHY index.

Signed-off-by: default avatarIcenowy Zheng <icenowy@aosc.io>
Reviewed-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
parent 1726ea90
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+7 −0
Original line number Diff line number Diff line
@@ -126,6 +126,7 @@ struct sun4i_usb_phy_cfg {
	bool dedicated_clocks;
	bool enable_pmu_unk1;
	bool phy0_dual_route;
	int missing_phys;
};

struct sun4i_usb_phy_data {
@@ -646,6 +647,9 @@ static struct phy *sun4i_usb_phy_xlate(struct device *dev,
	if (args->args[0] >= data->cfg->num_phys)
		return ERR_PTR(-ENODEV);

	if (data->cfg->missing_phys & BIT(args->args[0]))
		return ERR_PTR(-ENODEV);

	return data->phys[args->args[0]].phy;
}

@@ -741,6 +745,9 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev)
		struct sun4i_usb_phy *phy = data->phys + i;
		char name[16];

		if (data->cfg->missing_phys & BIT(i))
			continue;

		snprintf(name, sizeof(name), "usb%d_vbus", i);
		phy->vbus = devm_regulator_get_optional(dev, name);
		if (IS_ERR(phy->vbus)) {