Commit 2646fb03 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86-hyperv-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 Hyper-V update from Ingo Molnar:
 "A single commit harmonizing the x86 and ARM64 Hyper-V constants
  namespace"

* tag 'x86-hyperv-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/hyperv: Remove aliases with X64 in their name
parents ee4a9251 dfc53baa

arch/x86/hyperv/hv_init.c

+4 −4
Original line number Diff line number Diff line
@@ -148,9 +148,9 @@ static inline bool hv_reenlightenment_available(void) 
	 * Check for required features and priviliges to make TSC frequency

	 * change notifications work.

	 */

	return ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&

	return ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&

		ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE &&

		ms_hyperv.features & HV_X64_ACCESS_REENLIGHTENMENT;

		ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT;

}



DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_reenlightenment)
@@ -330,8 +330,8 @@ void __init hyperv_init(void) 
		return;



	/* Absolutely required MSRs */

	required_msrs = HV_X64_MSR_HYPERCALL_AVAILABLE |

		HV_X64_MSR_VP_INDEX_AVAILABLE;

	required_msrs = HV_MSR_HYPERCALL_AVAILABLE |

		HV_MSR_VP_INDEX_AVAILABLE;



	if ((ms_hyperv.features & required_msrs) != required_msrs)

		return;

arch/x86/hyperv/hv_spinlock.c

+1 −1
Original line number Diff line number Diff line
@@ -66,7 +66,7 @@ void __init hv_init_spinlocks(void) 
{

	if (!hv_pvspin || !apic ||

	    !(ms_hyperv.hints & HV_X64_CLUSTER_IPI_RECOMMENDED) ||

	    !(ms_hyperv.features & HV_X64_MSR_GUEST_IDLE_AVAILABLE)) {

	    !(ms_hyperv.features & HV_MSR_GUEST_IDLE_AVAILABLE)) {

		pr_info("PV spinlocks disabled\n");

		return;

	}

arch/x86/include/asm/hyperv-tlfs.h

+0 −33
Original line number Diff line number Diff line
@@ -27,39 +27,6 @@ 
#define HYPERV_CPUID_MIN			0x40000005

#define HYPERV_CPUID_MAX			0x4000ffff



/*

 * Aliases for Group A features that have X64 in the name.

 * On x86/x64 these are HYPERV_CPUID_FEATURES.EAX bits.

 */



#define HV_X64_MSR_VP_RUNTIME_AVAILABLE		\

		HV_MSR_VP_RUNTIME_AVAILABLE

#define HV_X64_MSR_SYNIC_AVAILABLE		\

		HV_MSR_SYNIC_AVAILABLE

#define HV_X64_MSR_APIC_ACCESS_AVAILABLE	\

		HV_MSR_APIC_ACCESS_AVAILABLE

#define HV_X64_MSR_HYPERCALL_AVAILABLE		\

		HV_MSR_HYPERCALL_AVAILABLE

#define HV_X64_MSR_VP_INDEX_AVAILABLE		\

		HV_MSR_VP_INDEX_AVAILABLE

#define HV_X64_MSR_RESET_AVAILABLE		\

		HV_MSR_RESET_AVAILABLE

#define HV_X64_MSR_GUEST_IDLE_AVAILABLE		\

		HV_MSR_GUEST_IDLE_AVAILABLE

#define HV_X64_ACCESS_FREQUENCY_MSRS		\

		HV_ACCESS_FREQUENCY_MSRS

#define HV_X64_ACCESS_REENLIGHTENMENT		\

		HV_ACCESS_REENLIGHTENMENT

#define HV_X64_ACCESS_TSC_INVARIANT		\

		HV_ACCESS_TSC_INVARIANT



/*

 * Aliases for Group B features that have X64 in the name.

 * On x86/x64 these are HYPERV_CPUID_FEATURES.EBX bits.

 */

#define HV_X64_POST_MESSAGES		HV_POST_MESSAGES

#define HV_X64_SIGNAL_EVENTS		HV_SIGNAL_EVENTS



/*

 * Group D Features.  The bit assignments are custom to each architecture.

 * On x86/x64 these are HYPERV_CPUID_FEATURES.EDX bits.

arch/x86/kernel/cpu/mshyperv.c

+4 −4
Original line number Diff line number Diff line
@@ -248,7 +248,7 @@ static void __init ms_hyperv_init_platform(void) 
			hv_host_info_edx >> 24, hv_host_info_edx & 0xFFFFFF);

	}



	if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&

	if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&

	    ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {

		x86_platform.calibrate_tsc = hv_get_tsc_khz;

		x86_platform.calibrate_cpu = hv_get_tsc_khz;
@@ -270,7 +270,7 @@ static void __init ms_hyperv_init_platform(void) 
		crash_kexec_post_notifiers = true;



#ifdef CONFIG_X86_LOCAL_APIC

	if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&

	if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&

	    ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {

		/*

		 * Get the APIC frequency.
@@ -296,7 +296,7 @@ static void __init ms_hyperv_init_platform(void) 
	machine_ops.shutdown = hv_machine_shutdown;

	machine_ops.crash_shutdown = hv_machine_crash_shutdown;

#endif

	if (ms_hyperv.features & HV_X64_ACCESS_TSC_INVARIANT) {

	if (ms_hyperv.features & HV_ACCESS_TSC_INVARIANT) {

		wrmsrl(HV_X64_MSR_TSC_INVARIANT_CONTROL, 0x1);

		setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);

	} else {
@@ -330,7 +330,7 @@ static void __init ms_hyperv_init_platform(void) 
	alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, asm_sysvec_hyperv_callback);



	/* Setup the IDT for reenlightenment notifications */

	if (ms_hyperv.features & HV_X64_ACCESS_REENLIGHTENMENT) {

	if (ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT) {

		alloc_intr_gate(HYPERV_REENLIGHTENMENT_VECTOR,

				asm_sysvec_hyperv_reenlightenment);

	}

arch/x86/kvm/hyperv.c

+10 −10
Original line number Diff line number Diff line
@@ -2000,20 +2000,20 @@ int kvm_vcpu_ioctl_get_hv_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid2 *cpuid, 
			break;



		case HYPERV_CPUID_FEATURES:

			ent->eax |= HV_X64_MSR_VP_RUNTIME_AVAILABLE;

			ent->eax |= HV_MSR_VP_RUNTIME_AVAILABLE;

			ent->eax |= HV_MSR_TIME_REF_COUNT_AVAILABLE;

			ent->eax |= HV_X64_MSR_SYNIC_AVAILABLE;

			ent->eax |= HV_MSR_SYNIC_AVAILABLE;

			ent->eax |= HV_MSR_SYNTIMER_AVAILABLE;

			ent->eax |= HV_X64_MSR_APIC_ACCESS_AVAILABLE;

			ent->eax |= HV_X64_MSR_HYPERCALL_AVAILABLE;

			ent->eax |= HV_X64_MSR_VP_INDEX_AVAILABLE;

			ent->eax |= HV_X64_MSR_RESET_AVAILABLE;

			ent->eax |= HV_MSR_APIC_ACCESS_AVAILABLE;

			ent->eax |= HV_MSR_HYPERCALL_AVAILABLE;

			ent->eax |= HV_MSR_VP_INDEX_AVAILABLE;

			ent->eax |= HV_MSR_RESET_AVAILABLE;

			ent->eax |= HV_MSR_REFERENCE_TSC_AVAILABLE;

			ent->eax |= HV_X64_ACCESS_FREQUENCY_MSRS;

			ent->eax |= HV_X64_ACCESS_REENLIGHTENMENT;

			ent->eax |= HV_ACCESS_FREQUENCY_MSRS;

			ent->eax |= HV_ACCESS_REENLIGHTENMENT;



			ent->ebx |= HV_X64_POST_MESSAGES;

			ent->ebx |= HV_X64_SIGNAL_EVENTS;

			ent->ebx |= HV_POST_MESSAGES;

			ent->ebx |= HV_SIGNAL_EVENTS;



			ent->edx |= HV_FEATURE_FREQUENCY_MSRS_AVAILABLE;

			ent->edx |= HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE;

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