Commit 262fd6ff authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm 

Pull ARM fixes from Russell King:
 "The larger changes this time are

   - "ARM: 7755/1: handle user space mapped pages in flush_kernel_dcache_page"
     which fixes more data corruption problems with O_DIRECT

   - "ARM: 7759/1: decouple CPU offlining from reboot/shutdown" which
     gets us back to working shutdown/reboot on SMP platforms

   - "ARM: 7752/1: errata: LoUIS bit field in CLIDR register is incorrect"
     which fixes a shutdown regression found in v3.10 on Versatile
     Express platforms.

  The remainder are the quite small, maybe one or two line changes"

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7759/1: decouple CPU offlining from reboot/shutdown
  ARM: 7756/1: zImage/virt: remove hyp-stub.S during distclean
  ARM: 7755/1: handle user space mapped pages in flush_kernel_dcache_page
  ARM: 7754/1: Fix the CPU ID and the mask associated to the PJ4B
  ARM: 7753/1: map_init_section flushes incorrect pmd
  ARM: 7752/1: errata: LoUIS bit field in CLIDR register is incorrect
parents 17858ca6 19ab428f

arch/arm/Kconfig

+11 −1
Original line number Diff line number Diff line
@@ -1189,6 +1189,16 @@ config PL310_ERRATA_588369 
	   is not correctly implemented in PL310 as clean lines are not

	   invalidated as a result of these operations.



config ARM_ERRATA_643719

	bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"

	depends on CPU_V7 && SMP

	help

	  This option enables the workaround for the 643719 Cortex-A9 (prior to

	  r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR

	  register returns zero when it should return one. The workaround

	  corrects this value, ensuring cache maintenance operations which use

	  it behave as intended and avoiding data corruption.



config ARM_ERRATA_720789

	bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"

	depends on CPU_V7
@@ -2006,7 +2016,7 @@ config XIP_PHYS_ADDR 


config KEXEC

	bool "Kexec system call (EXPERIMENTAL)"

	depends on (!SMP || HOTPLUG_CPU)

	depends on (!SMP || PM_SLEEP_SMP)

	help

	  kexec is a system call that implements the ability to shutdown your

	  current kernel, and to start another kernel.  It is like a reboot

arch/arm/boot/compressed/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -116,7 +116,8 @@ targets := vmlinux vmlinux.lds \ 


# Make sure files are removed during clean

extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern \

		 lib1funcs.S ashldi3.S $(libfdt) $(libfdt_hdrs)

		 lib1funcs.S ashldi3.S $(libfdt) $(libfdt_hdrs) \

		 hyp-stub.S



ifeq ($(CONFIG_FUNCTION_TRACER),y)

ORIG_CFLAGS := $(KBUILD_CFLAGS)

arch/arm/include/asm/cacheflush.h

+1 −3
Original line number Diff line number Diff line
@@ -320,9 +320,7 @@ static inline void flush_anon_page(struct vm_area_struct *vma, 
}



#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE

static inline void flush_kernel_dcache_page(struct page *page)

{

}

extern void flush_kernel_dcache_page(struct page *);



#define flush_dcache_mmap_lock(mapping) \

	spin_lock_irq(&(mapping)->tree_lock)

arch/arm/kernel/machine_kexec.c

+4 −0
Original line number Diff line number Diff line
@@ -134,6 +134,10 @@ void machine_kexec(struct kimage *image) 
	unsigned long reboot_code_buffer_phys;

	void *reboot_code_buffer;



	if (num_online_cpus() > 1) {

		pr_err("kexec: error: multiple CPUs still online\n");

		return;

	}



	page_list = image->head & PAGE_MASK;

arch/arm/kernel/process.c

+37 −6
Original line number Diff line number Diff line
@@ -184,30 +184,61 @@ int __init reboot_setup(char *str) 


__setup("reboot=", reboot_setup);



/*

 * Called by kexec, immediately prior to machine_kexec().

 *

 * This must completely disable all secondary CPUs; simply causing those CPUs

 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the

 * kexec'd kernel to use any and all RAM as it sees fit, without having to

 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug

 * functionality embodied in disable_nonboot_cpus() to achieve this.

 */

void machine_shutdown(void)

{

#ifdef CONFIG_SMP

	smp_send_stop();

#endif

	disable_nonboot_cpus();

}



/*

 * Halting simply requires that the secondary CPUs stop performing any

 * activity (executing tasks, handling interrupts). smp_send_stop()

 * achieves this.

 */

void machine_halt(void)

{

	machine_shutdown();

	smp_send_stop();



	local_irq_disable();

	while (1);

}



/*

 * Power-off simply requires that the secondary CPUs stop performing any

 * activity (executing tasks, handling interrupts). smp_send_stop()

 * achieves this. When the system power is turned off, it will take all CPUs

 * with it.

 */

void machine_power_off(void)

{

	machine_shutdown();

	smp_send_stop();



	if (pm_power_off)

		pm_power_off();

}



/*

 * Restart requires that the secondary CPUs stop performing any activity

 * while the primary CPU resets the system. Systems with a single CPU can

 * use soft_restart() as their machine descriptor's .restart hook, since that

 * will cause the only available CPU to reset. Systems with multiple CPUs must

 * provide a HW restart implementation, to ensure that all CPUs reset at once.

 * This is required so that any code running after reset on the primary CPU

 * doesn't have to co-ordinate with other CPUs to ensure they aren't still

 * executing pre-reset code, and using RAM that the primary CPU's code wishes

 * to use. Implementing such co-ordination would be essentially impossible.

 */

void machine_restart(char *cmd)

{

	machine_shutdown();

	smp_send_stop();



	arm_pm_restart(reboot_mode, cmd);

CRA Git | Maintained and supported by SUSTech CRA and CCSE