Commit 262fc784 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'versatile-for-v5.9' of...

Merge tag 'versatile-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt

Versatile DTS changes for the v5.9 kernel cycle, essentially
just a single patch fixing up the node names for schema.

* tag 'versatile-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: dts: arm-realview: Align L2 cache-controller nodename with dtschema

Link: https://lore.kernel.org/r/CACRpkdbkM9ZmuG2FnBmO7upcJfnqq2oSLDCFDXC5b3K+dtps9Q@mail.gmail.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 3b796abd f7f7a8f4
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+1 −1
Original line number Diff line number Diff line
@@ -59,7 +59,7 @@
			interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
		};

		L2: l2-cache {
		L2: cache-controller {
			compatible = "arm,l220-cache";
			reg = <0x1f002000 0x1000>;
			interrupt-parent = <&intc>;
+1 −1
Original line number Diff line number Diff line
@@ -323,7 +323,7 @@
			      <0x10120000 0x100>;
		};

		L2: l2-cache {
		L2: cache-controller {
			compatible = "arm,l220-cache";
			reg = <0x10110000 0x1000>;
			interrupt-parent = <&intc_dc1176>;
+1 −1
Original line number Diff line number Diff line
@@ -92,7 +92,7 @@
		      <0x1f000100 0x100>;
	};

	L2: l2-cache {
	L2: cache-controller {
		compatible = "arm,l220-cache";
		reg = <0x1f002000 0x1000>;
		interrupt-parent = <&intc_tc11mp>;
+1 −1
Original line number Diff line number Diff line
@@ -60,7 +60,7 @@
		};
	};

	L2: l2-cache {
	L2: cache-controller {
		compatible = "arm,pl310-cache";
		reg = <0x1f002000 0x1000>;
		cache-unified;