Commit 26220da2 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'sunxi-dt-for-4.20' of...

Merge tag 'sunxi-dt-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

Allwinner DT changes for 4.20

Our usual bunch of DT patches for the Allwinner arm32 SoCs.

The most notable changes are:
  - Support for the video decoding / encoding engine on the
    A10s/A13/A20/A33
  - IR support for the A83t
  - SATA support for the R40

* tag 'sunxi-dt-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux

:
  ARM: dts: sun9i: Fix I2C bus warnings
  ARM: dts: sunxi: Fix I2C bus warnings
  ARM: dts: sun8i-a33: Add Video Engine and reserved memory nodes
  ARM: dts: sun7i-a20: Add Video Engine and reserved memory nodes
  ARM: dts: sun5i: Add Video Engine and reserved memory nodes
  ARM: dts: sun8i: sun8i-r40-bananapi-m2-ultra: enable AHCI
  ARM: dts: sun8i: r40: add sata node
  ARM: dts: sunxi: Don't use cd-inverted in sun8i-r40-bananapi-m2-ultra
  ARM: dts: sun8i: a83t: bananapi-m3: Enable IR controller
  ARM: dts: sun8i: a83t: Add support for the cir interface
  ARM: dts: sun8i: a83t: Add the cir pin for the A83T

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 8bdc2e56 57a83c52
Loading
Loading
Loading
Loading
+2 −1
Original line number Diff line number Diff line
@@ -92,7 +92,8 @@
	 */
	clock-frequency = <400000>;

	touchscreen: touchscreen {
	touchscreen: touchscreen@40 {
		reg = <0x40>;
		interrupt-parent = <&pio>;
		interrupts = <6 11 IRQ_TYPE_EDGE_FALLING>; /* EINT11 (PG11) */
		pinctrl-names = "default";
+26 −0
Original line number Diff line number Diff line
@@ -108,6 +108,21 @@
		};
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/* Address must be kept in the lower 256 MiBs of DRAM for VE. */
		cma_pool: cma@4a000000 {
			compatible = "shared-dma-pool";
			size = <0x6000000>;
			alloc-ranges = <0x4a000000 0x6000000>;
			reusable;
			linux,cma-default;
		};
	};

	soc@1c00000 {
		compatible = "simple-bus";
		#address-cells = <1>;
@@ -294,6 +309,17 @@
			};
		};

		video-codec@1c0e000 {
			compatible = "allwinner,sun5i-a13-video-engine";
			reg = <0x01c0e000 0x1000>;
			clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
				 <&ccu CLK_DRAM_VE>;
			clock-names = "ahb", "mod", "ram";
			resets = <&ccu RST_VE>;
			interrupts = <53>;
			allwinner,sram = <&ve_sram 1>;
		};

		mmc0: mmc@1c0f000 {
			compatible = "allwinner,sun5i-a13-mmc";
			reg = <0x01c0f000 0x1000>;
+26 −0
Original line number Diff line number Diff line
@@ -174,6 +174,21 @@
		reg = <0x40000000 0x80000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/* Address must be kept in the lower 256 MiBs of DRAM for VE. */
		cma_pool: cma@4a000000 {
			compatible = "shared-dma-pool";
			size = <0x6000000>;
			alloc-ranges = <0x4a000000 0x6000000>;
			reusable;
			linux,cma-default;
		};
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@@ -479,6 +494,17 @@
			};
		};

		video-codec@1c0e000 {
			compatible = "allwinner,sun7i-a20-video-engine";
			reg = <0x01c0e000 0x1000>;
			clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
				 <&ccu CLK_DRAM_VE>;
			clock-names = "ahb", "mod", "ram";
			resets = <&ccu RST_VE>;
			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
			allwinner,sram = <&ve_sram 1>;
		};

		mmc0: mmc@1c0f000 {
			compatible = "allwinner,sun7i-a20-mmc";
			reg = <0x01c0f000 0x1000>;
+26 −0
Original line number Diff line number Diff line
@@ -190,6 +190,21 @@
		reg = <0x40000000 0x80000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/* Address must be kept in the lower 256 MiBs of DRAM for VE. */
		cma_pool: cma@4a000000 {
			compatible = "shared-dma-pool";
			size = <0x6000000>;
			alloc-ranges = <0x4a000000 0x6000000>;
			reusable;
			linux,cma-default;
		};
	};

	sound: sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "sun8i-a33-audio";
@@ -254,6 +269,17 @@
			};
		};

		video-codec@01c0e000 {
			compatible = "allwinner,sun8i-a33-video-engine";
			reg = <0x01c0e000 0x1000>;
			clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
				 <&ccu CLK_DRAM_VE>;
			clock-names = "ahb", "mod", "ram";
			resets = <&ccu RST_BUS_VE>;
			interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
			allwinner,sram = <&ve_sram 1>;
		};

		crypto: crypto-engine@1c15000 {
			compatible = "allwinner,sun4i-a10-crypto";
			reg = <0x01c15000 0x1000>;
+5 −0
Original line number Diff line number Diff line
@@ -191,6 +191,11 @@
	status = "okay";
};

&r_cir {
	clock-frequency = <3000000>;
	status = "okay";
};

&r_rsb {
	status = "okay";

Loading