Commit 261e071a authored by Tomas Winkler's avatar Tomas Winkler Committed by Greg Kroah-Hartman
Browse files

mei: abstract fw status register read.



This is to allow working with mei devices embedded within
another pci device, where mei device is represented
as a platform child device and fw status registers
are not necessarily resident in the device pci config space.

Bump the copyright year to 2019 on the modified files.

Signed-off-by: default avatarTomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20191106223841.15802-4-tomas.winkler@intel.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 261b3e1f
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+16 −8
Original line number Diff line number Diff line
@@ -183,20 +183,19 @@ static inline void mei_me_d0i3c_write(struct mei_device *dev, u32 reg)
static int mei_me_fw_status(struct mei_device *dev,
			    struct mei_fw_status *fw_status)
{
	struct pci_dev *pdev = to_pci_dev(dev->dev);
	struct mei_me_hw *hw = to_me_hw(dev);
	const struct mei_fw_status *fw_src = &hw->cfg->fw_status;
	int ret;
	int i;

	if (!fw_status)
	if (!fw_status || !hw->read_fws)
		return -EINVAL;

	fw_status->count = fw_src->count;
	for (i = 0; i < fw_src->count && i < MEI_FW_STATUS_MAX; i++) {
		ret = pci_read_config_dword(pdev, fw_src->status[i],
		ret = hw->read_fws(dev, fw_src->status[i],
				   &fw_status->status[i]);
		trace_mei_pci_cfg_read(dev->dev, "PCI_CFG_HSF_X",
		trace_mei_pci_cfg_read(dev->dev, "PCI_CFG_HFS_X",
				       fw_src->status[i],
				       fw_status->status[i]);
		if (ret)
@@ -210,19 +209,26 @@ static int mei_me_fw_status(struct mei_device *dev,
 * mei_me_hw_config - configure hw dependent settings
 *
 * @dev: mei device
 *
 * Return:
 *  * -EINVAL when read_fws is not set
 *  * 0 on success
 *
 */
static void mei_me_hw_config(struct mei_device *dev)
static int mei_me_hw_config(struct mei_device *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev->dev);
	struct mei_me_hw *hw = to_me_hw(dev);
	u32 hcsr, reg;

	if (WARN_ON(!hw->read_fws))
		return -EINVAL;

	/* Doesn't change in runtime */
	hcsr = mei_hcsr_read(dev);
	hw->hbuf_depth = (hcsr & H_CBD) >> 24;

	reg = 0;
	pci_read_config_dword(pdev, PCI_CFG_HFS_1, &reg);
	hw->read_fws(dev, PCI_CFG_HFS_1, &reg);
	trace_mei_pci_cfg_read(dev->dev, "PCI_CFG_HFS_1", PCI_CFG_HFS_1, reg);
	hw->d0i3_supported =
		((reg & PCI_CFG_HFS_1_D0I3_MSK) == PCI_CFG_HFS_1_D0I3_MSK);
@@ -233,6 +239,8 @@ static void mei_me_hw_config(struct mei_device *dev)
		if (reg & H_D0I3C_I3)
			hw->pg_state = MEI_PG_ON;
	}

	return 0;
}

/**
+2 −0
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ struct mei_cfg {
 * @pg_state: power gating state
 * @d0i3_supported: di03 support
 * @hbuf_depth: depth of hardware host/write buffer in slots
 * @read_fws: read FW status register handler
 */
struct mei_me_hw {
	const struct mei_cfg *cfg;
@@ -54,6 +55,7 @@ struct mei_me_hw {
	enum mei_pg_state pg_state;
	bool d0i3_supported;
	u8 hbuf_depth;
	int (*read_fws)(const struct mei_device *dev, int where, u32 *val);
};

#define to_me_hw(dev) (struct mei_me_hw *)((dev)->hw)
+7 −3
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2013-2014, Intel Corporation. All rights reserved.
 * Copyright (c) 2013-2019, Intel Corporation. All rights reserved.
 * Intel Management Engine Interface (Intel MEI) Linux driver
 */

@@ -666,8 +666,10 @@ static int mei_txe_fw_status(struct mei_device *dev,
 *
 * Configure hardware at the start of the device should be done only
 *   once at the device probe time
 *
 * Return: always 0
 */
static void mei_txe_hw_config(struct mei_device *dev)
static int mei_txe_hw_config(struct mei_device *dev)
{

	struct mei_txe_hw *hw = to_txe_hw(dev);
@@ -677,6 +679,8 @@ static void mei_txe_hw_config(struct mei_device *dev)

	dev_dbg(dev->dev, "aliveness_resp = 0x%08x, readiness = 0x%08x.\n",
		hw->aliveness, hw->readiness);

	return 0;
}

/**
+4 −2
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2012-2018, Intel Corporation. All rights reserved.
 * Copyright (c) 2012-2019, Intel Corporation. All rights reserved.
 * Intel Management Engine Interface (Intel MEI) Linux driver
 */

@@ -190,7 +190,9 @@ int mei_start(struct mei_device *dev)
	/* acknowledge interrupt and stop interrupts */
	mei_clear_interrupts(dev);

	mei_hw_config(dev);
	ret = mei_hw_config(dev);
	if (ret)
		goto err;

	dev_dbg(dev->dev, "reset in start the mei device.\n");

+4 −4
Original line number Diff line number Diff line
/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2003-2018, Intel Corporation. All rights reserved.
 * Copyright (c) 2003-2019, Intel Corporation. All rights reserved.
 * Intel Management Engine Interface (Intel MEI) Linux driver
 */

@@ -287,7 +287,7 @@ struct mei_hw_ops {
	bool (*hw_is_ready)(struct mei_device *dev);
	int (*hw_reset)(struct mei_device *dev, bool enable);
	int (*hw_start)(struct mei_device *dev);
	void (*hw_config)(struct mei_device *dev);
	int (*hw_config)(struct mei_device *dev);

	int (*fw_status)(struct mei_device *dev, struct mei_fw_status *fw_sts);
	enum mei_pg_state (*pg_state)(struct mei_device *dev);
@@ -614,9 +614,9 @@ void mei_irq_compl_handler(struct mei_device *dev, struct list_head *cmpl_list);
 */


static inline void mei_hw_config(struct mei_device *dev)
static inline int mei_hw_config(struct mei_device *dev)
{
	dev->ops->hw_config(dev);
	return dev->ops->hw_config(dev);
}

static inline enum mei_pg_state mei_pg_state(struct mei_device *dev)
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