arm64: dts: meson: g12a: Add mali-g31 gpu node

				snps,quirk-frame-length-adjustment;

			};

		};

		mali: gpu@ffe40000 {

			compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";

			reg = <0x0 0xffe40000 0x0 0x40000>;

			interrupt-parent = <&gic>;

			interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "gpu", "mmu", "job";

			clocks = <&clkc CLKID_MALI>;

			resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;

			/*

			 * Mali clocking is provided by two identical clock paths

			 * MALI_0 and MALI_1 muxed to a single clock by a glitch

			 * free mux to safely change frequency while running.

			 */

			assigned-clocks = <&clkc CLKID_MALI_0_SEL>,

					  <&clkc CLKID_MALI_0>,

					  <&clkc CLKID_MALI>; /* Glitch free mux */

			assigned-clock-parents = <&clkc CLKID_FCLK_DIV2P5>,

						 <0>, /* Do Nothing */

						 <&clkc CLKID_MALI_0>;

			assigned-clock-rates = <0>, /* Do Nothing */

					       <800000000>,

					       <0>; /* Do Nothing */

		};

	};

	timer {