Commit 260311bf authored by Chen-Yu Tsai's avatar Chen-Yu Tsai
Browse files

clk: sunxi-ng: sun5i: Use local parent references for CLK_FIXED_FACTOR 



With the new clk parenting code and CLK_FIXED_FACTOR_{HW,FW_NAME}
macros, we can reference parents locally via pointers to struct clk_hw
or DT clock-names.

Convert existing CLK_FIXED_FACTOR definitions to either the _HW or
_FW_NAME variant based on whether the parent clock is internal or
external to the CCU.

Acked-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
parent d1c92473

drivers/clk/sunxi-ng/ccu-sun5i.c

+22 −12
Original line number Diff line number Diff line
@@ -611,19 +611,29 @@ static struct ccu_common *sun5i_a10s_ccu_clks[] = { 
	&iep_clk.common,

};



static const struct clk_hw *clk_parent_pll_audio[] = {

	&pll_audio_base_clk.common.hw

};



/* We hardcode the divider to 1 for now */

static CLK_FIXED_FACTOR(pll_audio_clk, "pll-audio",

			"pll-audio-base", 1, 1, CLK_SET_RATE_PARENT);

static CLK_FIXED_FACTOR(pll_audio_2x_clk, "pll-audio-2x",

			"pll-audio-base", 2, 1, CLK_SET_RATE_PARENT);

static CLK_FIXED_FACTOR(pll_audio_4x_clk, "pll-audio-4x",

			"pll-audio-base", 1, 1, CLK_SET_RATE_PARENT);

static CLK_FIXED_FACTOR(pll_audio_8x_clk, "pll-audio-8x",

			"pll-audio-base", 1, 2, CLK_SET_RATE_PARENT);

static CLK_FIXED_FACTOR(pll_video0_2x_clk, "pll-video0-2x",

			"pll-video0", 1, 2, CLK_SET_RATE_PARENT);

static CLK_FIXED_FACTOR(pll_video1_2x_clk, "pll-video1-2x",

			"pll-video1", 1, 2, CLK_SET_RATE_PARENT);

static CLK_FIXED_FACTOR_HWS(pll_audio_clk, "pll-audio",

			    clk_parent_pll_audio,

			    1, 1, CLK_SET_RATE_PARENT);

static CLK_FIXED_FACTOR_HWS(pll_audio_2x_clk, "pll-audio-2x",

			    clk_parent_pll_audio,

			    2, 1, CLK_SET_RATE_PARENT);

static CLK_FIXED_FACTOR_HWS(pll_audio_4x_clk, "pll-audio-4x",

			    clk_parent_pll_audio,

			    1, 1, CLK_SET_RATE_PARENT);

static CLK_FIXED_FACTOR_HWS(pll_audio_8x_clk, "pll-audio-8x",

			    clk_parent_pll_audio,

			    1, 2, CLK_SET_RATE_PARENT);

static CLK_FIXED_FACTOR_HW(pll_video0_2x_clk, "pll-video0-2x",

			   &pll_video0_clk.common.hw,

			   1, 2, CLK_SET_RATE_PARENT);

static CLK_FIXED_FACTOR_HW(pll_video1_2x_clk, "pll-video1-2x",

			   &pll_video1_clk.common.hw,

			   1, 2, CLK_SET_RATE_PARENT);



static struct clk_hw_onecell_data sun5i_a10s_hw_clks = {

	.hws	= {

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