Commit 25d11631 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'mvebu-fixes-3.16-2' of git://git.infradead.org/linux-mvebu into fixes 

mvebu fixes for v3.16 (round #2)

 - mvebu
    - Fix PCIe deadlock now that SMP is enabled
    - Fix cpuidle for big-endian systems

* tag 'mvebu-fixes-3.16-2' of git://git.infradead.org/linux-mvebu

:
  ARM: mvebu: fix cpuidle implementation to work on big-endian systems
  ARM: mvebu: update L2/PCIe deadlock workaround after L2CC cleanup
  ARM: mvebu: move Armada 375 external abort logic as a quirk

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents d767af5e 6509dc74

arch/arm/mach-mvebu/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@ CFLAGS_pmsu.o := -march=armv7-a 
obj-y				 += system-controller.o mvebu-soc-id.o



ifeq ($(CONFIG_MACH_MVEBU_V7),y)

obj-y				 += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o

obj-y				 += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o pmsu_ll.o

obj-$(CONFIG_SMP)		 += platsmp.o headsmp.o platsmp-a9.o headsmp-a9.o

obj-$(CONFIG_HOTPLUG_CPU)	 += hotplug.o

endif

arch/arm/mach-mvebu/board-v7.c

+19 −10
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
#include <linux/mbus.h>

#include <linux/signal.h>

#include <linux/slab.h>

#include <linux/irqchip.h>

#include <asm/hardware/cache-l2x0.h>

#include <asm/mach/arch.h>

#include <asm/mach/map.h>
@@ -71,15 +72,21 @@ static int armada_375_external_abort_wa(unsigned long addr, unsigned int fsr, 
	return 1;

}



static void __init mvebu_timer_and_clk_init(void)

static void __init mvebu_init_irq(void)

{

	of_clk_init(NULL);

	clocksource_of_init();

	irqchip_init();

	mvebu_scu_enable();

	coherency_init();

	BUG_ON(mvebu_mbus_dt_init(coherency_available()));

}



static void __init external_abort_quirk(void)

{

	u32 dev, rev;



	if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > ARMADA_375_Z1_REV)

		return;



	if (of_machine_is_compatible("marvell,armada375"))

	hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0,

			"imprecise external abort");

}
@@ -169,8 +176,10 @@ static void __init mvebu_dt_init(void) 
{

	if (of_machine_is_compatible("plathome,openblocks-ax3-4"))

		i2c_quirk();

	if (of_machine_is_compatible("marvell,a375-db"))

	if (of_machine_is_compatible("marvell,a375-db")) {

		external_abort_quirk();

		thermal_quirk();

	}



	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);

}
@@ -185,7 +194,7 @@ DT_MACHINE_START(ARMADA_370_XP_DT, "Marvell Armada 370/XP (Device Tree)") 
	.l2c_aux_mask	= ~0,

	.smp		= smp_ops(armada_xp_smp_ops),

	.init_machine	= mvebu_dt_init,

	.init_time	= mvebu_timer_and_clk_init,

	.init_irq       = mvebu_init_irq,

	.restart	= mvebu_restart,

	.dt_compat	= armada_370_xp_dt_compat,

MACHINE_END
@@ -198,7 +207,7 @@ static const char * const armada_375_dt_compat[] = { 
DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)")

	.l2c_aux_val	= 0,

	.l2c_aux_mask	= ~0,

	.init_time	= mvebu_timer_and_clk_init,

	.init_irq       = mvebu_init_irq,

	.init_machine	= mvebu_dt_init,

	.restart	= mvebu_restart,

	.dt_compat	= armada_375_dt_compat,
@@ -213,7 +222,7 @@ static const char * const armada_38x_dt_compat[] = { 
DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)")

	.l2c_aux_val	= 0,

	.l2c_aux_mask	= ~0,

	.init_time	= mvebu_timer_and_clk_init,

	.init_irq       = mvebu_init_irq,

	.restart	= mvebu_restart,

	.dt_compat	= armada_38x_dt_compat,

MACHINE_END

arch/arm/mach-mvebu/pmsu.c

+2 −7
Original line number Diff line number Diff line
@@ -66,6 +66,8 @@ static void __iomem *pmsu_mp_base; 
extern void ll_disable_coherency(void);

extern void ll_enable_coherency(void);



extern void armada_370_xp_cpu_resume(void);



static struct platform_device armada_xp_cpuidle_device = {

	.name = "cpuidle-armada-370-xp",

};
@@ -140,13 +142,6 @@ static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void) 
	writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL);

}



static void armada_370_xp_cpu_resume(void)

{

	asm volatile("bl    ll_add_cpu_to_smp_group\n\t"

		     "bl    ll_enable_coherency\n\t"

		     "b	    cpu_resume\n\t");

}



/* No locking is needed because we only access per-CPU registers */

void armada_370_xp_pmsu_idle_prepare(bool deepidle)

{

arch/arm/mach-mvebu/pmsu_ll.S

0 → 100644
+25 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2014 Marvell

 *

 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

 * Gregory Clement <gregory.clement@free-electrons.com>

 *

 * This file is licensed under the terms of the GNU General Public

 * License version 2.  This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 */



#include <linux/linkage.h>

#include <asm/assembler.h>



/*

 * This is the entry point through which CPUs exiting cpuidle deep

 * idle state are going.

 */

ENTRY(armada_370_xp_cpu_resume)

ARM_BE8(setend	be )			@ go BE8 if entered LE

	bl	ll_add_cpu_to_smp_group

	bl	ll_enable_coherency

	b	cpu_resume

ENDPROC(armada_370_xp_cpu_resume)

CRA Git | Maintained and supported by SUSTech CRA and CCSE