Commit 25cb42af authored by Helen Koike's avatar Helen Koike Committed by Mauro Carvalho Chehab
Browse files

media: staging: dt-bindings: add Rockchip ISP1 yaml bindings



Add yaml DT bindings for Rockchip ISP1.

This was tested and verified with:
mv drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.yaml Documentation/devicetree/bindings/media/
make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/media/rockchip-isp1.yaml
make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/media/rockchip-isp1.yaml

Signed-off-by: default avatarHelen Koike <helen.koike@collabora.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 1b257870
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# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/rockchip-isp1.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip SoC Image Signal Processing unit v1

maintainers:
  - Helen Koike <helen.koike@collabora.com>

description: |
  Rockchip ISP1 is the Camera interface for the Rockchip series of SoCs
  which contains image processing, scaling, and compression functions.

properties:
  compatible:
    const: rockchip,rk3399-cif-isp

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  iommus:
    maxItems: 1

  power-domains:
    maxItems: 1

  phys:
    maxItems: 1
    description: phandle for the PHY port

  phy-names:
    const: dphy

  clocks:
    items:
      - description: ISP clock
      - description: ISP AXI clock clock
      - description: ISP AXI clock  wrapper clock
      - description: ISP AHB clock clock
      - description: ISP AHB wrapper clock

  clock-names:
    items:
      - const: clk_isp
      - const: aclk_isp
      - const: aclk_isp_wrap
      - const: hclk_isp
      - const: hclk_isp_wrap

  # See ./video-interfaces.txt for details
  ports:
    type: object
    additionalProperties: false

    properties:
      "#address-cells":
        const: 1

      "#size-cells":
        const: 0

      port@0:
        type: object
        description: connection point for sensors at MIPI-DPHY RX0
        additionalProperties: false

        properties:
          "#address-cells":
            const: 1

          "#size-cells":
            const: 0

          reg:
            const: 0

        patternProperties:
          endpoint:
            type: object
            additionalProperties: false

            properties:
              reg:
                maxItems: 1

              data-lanes:
                minItems: 1
                maxItems: 4

              remote-endpoint: true

    required:
      - port@0

required:
  - compatible
  - interrupts
  - clocks
  - clock-names
  - power-domains
  - iommus
  - phys
  - phy-names
  - ports

additionalProperties: false

examples:
  - |

    #include <dt-bindings/clock/rk3399-cru.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/power/rk3399-power.h>

    parent0: parent@0 {
        #address-cells = <2>;
        #size-cells = <2>;

        isp0: isp0@ff910000 {
            compatible = "rockchip,rk3399-cif-isp";
            reg = <0x0 0xff910000 0x0 0x4000>;
            interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
            clocks = <&cru SCLK_ISP0>,
                     <&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>,
                     <&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>;
            clock-names = "clk_isp",
                          "aclk_isp", "aclk_isp_wrap",
                          "hclk_isp", "hclk_isp_wrap";
            power-domains = <&power RK3399_PD_ISP0>;
            iommus = <&isp0_mmu>;
            phys = <&dphy>;
            phy-names = "dphy";

            ports {
                #address-cells = <1>;
                #size-cells = <0>;

                port@0 {
                    #address-cells = <1>;
                    #size-cells = <0>;
                    reg = <0>;

                    mipi_in_wcam: endpoint@0 {
                        reg = <0>;
                        remote-endpoint = <&wcam_out>;
                        data-lanes = <1 2>;
                    };

                    mipi_in_ucam: endpoint@1 {
                        reg = <1>;
                        remote-endpoint = <&ucam_out>;
                        data-lanes = <1>;
                    };
                };
            };
        };

        i2c7: i2c@ff160000 {
            clock-frequency = <400000>;
            #address-cells = <1>;
            #size-cells = <0>;

            wcam: camera@36 {
                compatible = "ovti,ov5695";
                reg = <0x36>;

                port {
                    wcam_out: endpoint {
                        remote-endpoint = <&mipi_in_wcam>;
                        data-lanes = <1 2>;
                    };
                };
            };

            ucam: camera@3c {
                compatible = "ovti,ov2685";
                reg = <0x3c>;

                  port {
                      ucam_out: endpoint {
                          remote-endpoint = <&mipi_in_ucam>;
                          data-lanes = <1>;
                      };
                  };
            };
        };
    };