ARM: pm: avoid writing the auxillary control register for ARMv7 (25904157) · Commits · 戴 / test

For ARMv7 kernels running in the non-secure world, writing to the auxillary control register causes an abort, so we must avoid directly writing the auxillary control register. If the ACR has already been reinitialized by SoC code, don't try to restore it. Signed-off-by:

Russell King <rmk+kernel@arm.linux.org.uk>

arch/arm/mm/proc-v7.S

+3 −1

Original line number	Diff line number	Diff line
		@@ -248,7 +248,9 @@ ENTRY(cpu_v7_do_resume)
		mcr p15, 0, r7, c2, c0, 0 @ TTB 0
		mcr p15, 0, r8, c2, c0, 1 @ TTB 1
		mcr p15, 0, ip, c2, c0, 2 @ TTB control register
		mcr p15, 0, r10, c1, c0, 1 @ Auxiliary control register
		mrc p15, 0, r4, c1, c0, 1 @ Read Auxiliary control register
		teq r4, r10 @ Is it already set?
		mcrne p15, 0, r10, c1, c0, 1 @ No, so write it
		mcr p15, 0, r11, c1, c0, 2 @ Co-processor access control
		ldr r4, =PRRR @ PRRR
		ldr r5, =NMRR @ NMRR

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