Commit 2552c123 authored by Rajeshwari's avatar Rajeshwari Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sc7180: Add critical interrupt and cooling maps for TSENS in SC7180



Added critical interrupt support in TSENS node and cooling maps in Thermal-zones node.

Reviewed-by: default avatarAmit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: default avatarRajeshwari <rkambl@codeaurora.org>
Link: https://lore.kernel.org/r/1578317369-16045-2-git-send-email-rkambl@codeaurora.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 277a13b5
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+193 −4
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
#include <dt-bindings/reset/qcom,sdm845-pdc.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/thermal/thermal.h>

/ {
	interrupt-parent = <&intc>;
@@ -86,6 +87,7 @@
			reg = <0x0 0x0>;
			enable-method = "psci";
			next-level-cache = <&L2_0>;
			#cooling-cells = <2>;
			qcom,freq-domain = <&cpufreq_hw 0>;
			L2_0: l2-cache {
				compatible = "cache";
@@ -102,6 +104,7 @@
			reg = <0x0 0x100>;
			enable-method = "psci";
			next-level-cache = <&L2_100>;
			#cooling-cells = <2>;
			qcom,freq-domain = <&cpufreq_hw 0>;
			L2_100: l2-cache {
				compatible = "cache";
@@ -115,6 +118,7 @@
			reg = <0x0 0x200>;
			enable-method = "psci";
			next-level-cache = <&L2_200>;
			#cooling-cells = <2>;
			qcom,freq-domain = <&cpufreq_hw 0>;
			L2_200: l2-cache {
				compatible = "cache";
@@ -128,6 +132,7 @@
			reg = <0x0 0x300>;
			enable-method = "psci";
			next-level-cache = <&L2_300>;
			#cooling-cells = <2>;
			qcom,freq-domain = <&cpufreq_hw 0>;
			L2_300: l2-cache {
				compatible = "cache";
@@ -141,6 +146,7 @@
			reg = <0x0 0x400>;
			enable-method = "psci";
			next-level-cache = <&L2_400>;
			#cooling-cells = <2>;
			qcom,freq-domain = <&cpufreq_hw 0>;
			L2_400: l2-cache {
				compatible = "cache";
@@ -154,6 +160,7 @@
			reg = <0x0 0x500>;
			enable-method = "psci";
			next-level-cache = <&L2_500>;
			#cooling-cells = <2>;
			qcom,freq-domain = <&cpufreq_hw 0>;
			L2_500: l2-cache {
				compatible = "cache";
@@ -167,6 +174,7 @@
			reg = <0x0 0x600>;
			enable-method = "psci";
			next-level-cache = <&L2_600>;
			#cooling-cells = <2>;
			qcom,freq-domain = <&cpufreq_hw 1>;
			L2_600: l2-cache {
				compatible = "cache";
@@ -180,6 +188,7 @@
			reg = <0x0 0x700>;
			enable-method = "psci";
			next-level-cache = <&L2_700>;
			#cooling-cells = <2>;
			qcom,freq-domain = <&cpufreq_hw 1>;
			L2_700: l2-cache {
				compatible = "cache";
@@ -1163,8 +1172,9 @@
			reg = <0 0x0c263000 0 0x1ff>, /* TM */
				<0 0x0c222000 0 0x1ff>; /* SROT */
			#qcom,sensors = <15>;
			interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "uplow";
			interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "uplow","critical";
			#thermal-sensor-cells = <1>;
		};

@@ -1173,8 +1183,9 @@
			reg = <0 0x0c265000 0 0x1ff>, /* TM */
				<0 0x0c223000 0 0x1ff>; /* SROT */
			#qcom,sensors = <10>;
			interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "uplow";
			interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "uplow","critical";
			#thermal-sensor-cells = <1>;
		};

@@ -1507,6 +1518,27 @@
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu0_alert0>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
				map1 {
					trip = <&cpu0_alert1>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		cpu1-thermal {
@@ -1534,6 +1566,27 @@
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu1_alert0>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
				map1 {
					trip = <&cpu1_alert1>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		cpu2-thermal {
@@ -1561,6 +1614,27 @@
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu2_alert0>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
				map1 {
					trip = <&cpu2_alert1>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		cpu3-thermal {
@@ -1588,6 +1662,27 @@
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu3_alert0>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
				map1 {
					trip = <&cpu3_alert1>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		cpu4-thermal {
@@ -1615,6 +1710,27 @@
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu4_alert0>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
				map1 {
					trip = <&cpu4_alert1>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		cpu5-thermal {
@@ -1642,6 +1758,27 @@
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu5_alert0>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
				map1 {
					trip = <&cpu5_alert1>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		cpu6-thermal {
@@ -1669,6 +1806,19 @@
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu6_alert0>;
					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
				map1 {
					trip = <&cpu6_alert1>;
					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		cpu7-thermal {
@@ -1696,6 +1846,19 @@
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu7_alert0>;
					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
				map1 {
					trip = <&cpu7_alert1>;
					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		cpu8-thermal {
@@ -1723,6 +1886,19 @@
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu8_alert0>;
					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
				map1 {
					trip = <&cpu8_alert1>;
					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		cpu9-thermal {
@@ -1750,6 +1926,19 @@
					type = "critical";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu9_alert0>;
					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
				map1 {
					trip = <&cpu9_alert1>;
					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};
		};

		aoss0-thermal {