Commit 2542469d authored by Tzu-En Huang's avatar Tzu-En Huang Committed by Kalle Valo
Browse files

rtw88: fix non-increase management packet sequence number



In previous setting, management packets' sequence numbers will
not increase and always stay at 0. Add hw sequence number support
for mgmt packets.
The table below shows different sequence number setting in the
tx descriptor.

seq num ctrl      | EN_HWSEQ | DISQSELSEL | HW_SSN_SEL
------------------------------------------------------
sw ctrl           |    0     |    N/A     |    N/A
hw ctrl per MACID |    1     |     0      |    N/A
hw ctrl per HWREG |    1     |     1      |HWREG(0/1/2/3)

Signed-off-by: default avatarTzu-En Huang <tehuang@realtek.com>
Signed-off-by: default avatarYan-Hsuan Chuang <yhchuang@realtek.com>
Reviewed-by: default avatarBrian Norris <briannorris@chromium.org>
Tested-by: default avatarBrian Norris <briannorris@chromium.org>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200326020408.25218-1-yhchuang@realtek.com
parent 8bc513b9
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+3 −0
Original line number Diff line number Diff line
@@ -574,6 +574,9 @@ struct rtw_tx_pkt_info {
	bool short_gi;
	bool report;
	bool rts;
	bool dis_qselseq;
	bool en_hwseq;
	u8 hw_ssn_sel;
};

struct rtw_rx_pkt_stat {
+6 −0
Original line number Diff line number Diff line
@@ -58,6 +58,9 @@ void rtw_tx_fill_tx_desc(struct rtw_tx_pkt_info *pkt_info, struct sk_buff *skb)
	SET_TX_DESC_SPE_RPT(txdesc, pkt_info->report);
	SET_TX_DESC_SW_DEFINE(txdesc, pkt_info->sn);
	SET_TX_DESC_USE_RTS(txdesc, pkt_info->rts);
	SET_TX_DESC_DISQSELSEQ(txdesc, pkt_info->dis_qselseq);
	SET_TX_DESC_EN_HWSEQ(txdesc, pkt_info->en_hwseq);
	SET_TX_DESC_HW_SSN_SEL(txdesc, pkt_info->hw_ssn_sel);
}
EXPORT_SYMBOL(rtw_tx_fill_tx_desc);

@@ -227,6 +230,9 @@ static void rtw_tx_mgmt_pkt_info_update(struct rtw_dev *rtwdev,
	pkt_info->use_rate = true;
	pkt_info->rate_id = 6;
	pkt_info->dis_rate_fallback = true;
	pkt_info->dis_qselseq = true;
	pkt_info->en_hwseq = true;
	pkt_info->hw_ssn_sel = 0;
}

static void rtw_tx_data_pkt_info_update(struct rtw_dev *rtwdev,
+6 −0
Original line number Diff line number Diff line
@@ -53,6 +53,12 @@
	le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(19))
#define SET_TX_DESC_SW_DEFINE(tx_desc, value)                                  \
	le32p_replace_bits((__le32 *)(txdesc) + 0x06, value, GENMASK(11, 0))
#define SET_TX_DESC_DISQSELSEQ(txdesc, value)                                 \
	le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(31))
#define SET_TX_DESC_EN_HWSEQ(txdesc, value)                                   \
	le32p_replace_bits((__le32 *)(txdesc) + 0x08, value, BIT(15))
#define SET_TX_DESC_HW_SSN_SEL(txdesc, value)                                 \
	le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, GENMASK(7, 6))

enum rtw_tx_desc_queue_select {
	TX_DESC_QSEL_TID0	= 0,