Commit 250656b4 authored by Linus Walleij's avatar Linus Walleij
Browse files

ARM: ux500: push down Rohm TS to STUIB



The Rohm touchscreen reset and IRQ lines were registered and
configured at the HREF board level of the design, but it is an
integral part of the UIB (User Interface Board). Fix this by
pushing down the pin control node to the u8500 UIB file.

Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 8005c49d
Loading
Loading
Loading
Loading
+23 −0
Original line number Diff line number Diff line
@@ -114,6 +114,8 @@
				rohm,touch-max-x = <384>;
				rohm,touch-max-y = <704>;
				rohm,flip-y;
				pinctrl-names = "default";
				pinctrl-0 = <&touch_rohm_mode>;
			};

			bu21013_tp@5d {
@@ -124,6 +126,8 @@
				rohm,touch-max-x = <384>;
				rohm,touch-max-y = <704>;
				rohm,flip-y;
				pinctrl-names = "default";
				pinctrl-0 = <&touch_rohm_mode>;
			};
		};

@@ -166,6 +170,25 @@
					};
				};
			};
			touch {
				touch_rohm_mode: touch_rohm {
					/*
					 * ROHM touch screen uses GPIO 143 for
					 * RST1, GPIO 146 for RST2 and
					 * GPIO 67 for interrupts. Pull-up
					 * the IRQ line and drive both
					 * reset signals low.
					 */
					stuib_cfg1 {
						pins = "GPIO143_D12", "GPIO146_D13";
						ste,config = <&gpio_out_lo>;
					};
					stuib_cfg2 {
						pins = "GPIO67_G2";
						ste,config = <&gpio_in_pu>;
					};
				};
			};
		};
	};
};
+0 −18
Original line number Diff line number Diff line
@@ -43,7 +43,6 @@
				  <&vaudio_hf_hrefv60_mode>,
				  <&gbf_hrefv60_mode>,
				  <&hdtv_hrefv60_mode>,
				  <&touch_hrefv60_mode>,
				  <&gpios_hrefv60_mode>;

			sdi0 {
@@ -190,23 +189,6 @@
					};
				 };
			};
			touch {
				touch_hrefv60_mode: touch_hrefv60 {
					/*
					 * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
					 * GPIO 67 for interrupts. Pull-up the IRQ line and drive both
					 * reset signals low.
					 */
					hrefv60_cfg1 {
						pins = "GPIO143_D12", "GPIO146_D13";
						ste,config = <&gpio_out_lo>;
					};
					hrefv60_cfg2 {
						pins = "GPIO67_G2";
						ste,config = <&gpio_in_pu>;
					};
				};
			};
			mcde {
				lcd_hrefv60_mode: lcd_hrefv60 {
					/*