Commit 24cf262d authored by Will Deacon's avatar Will Deacon
Browse files

Merge branch 'for-next/timers' of... 

Merge branch 'for-next/timers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux into for-next/core

Conflicts:
	arch/arm64/Kconfig
	arch/arm64/include/asm/arch_timer.h
parents 50abbe19 0ea41539

Documentation/arm64/silicon-errata.txt

+1 −0
Original line number Diff line number Diff line
@@ -61,6 +61,7 @@ stable kernels. 
| ARM            | Cortex-A76      | #1188873        | ARM64_ERRATUM_1188873       |

| ARM            | Cortex-A76      | #1165522        | ARM64_ERRATUM_1165522       |

| ARM            | Cortex-A76      | #1286807        | ARM64_ERRATUM_1286807       |

| ARM            | Neoverse-N1     | #1188873        | ARM64_ERRATUM_1188873       |

| ARM            | MMU-500         | #841119,#826419 | N/A                         |

|                |                 |                 |                             |

| Cavium         | ThunderX ITS    | #22375, #24313  | CAVIUM_ERRATUM_22375        |

arch/arm/include/asm/arch_timer.h

+16 −2
Original line number Diff line number Diff line
@@ -11,6 +11,10 @@ 
#include <clocksource/arm_arch_timer.h>



#ifdef CONFIG_ARM_ARCH_TIMER

/* 32bit ARM doesn't know anything about timer errata... */

#define has_erratum_handler(h)		(false)

#define erratum_handler(h)		(arch_timer_##h)



int arch_timer_arch_init(void);



/*
@@ -79,7 +83,7 @@ static inline u32 arch_timer_get_cntfrq(void) 
	return val;

}



static inline u64 arch_counter_get_cntpct(void)

static inline u64 __arch_counter_get_cntpct(void)

{

	u64 cval;
@@ -88,7 +92,12 @@ static inline u64 arch_counter_get_cntpct(void) 
	return cval;

}



static inline u64 arch_counter_get_cntvct(void)

static inline u64 __arch_counter_get_cntpct_stable(void)

{

	return __arch_counter_get_cntpct();

}



static inline u64 __arch_counter_get_cntvct(void)

{

	u64 cval;
@@ -97,6 +106,11 @@ static inline u64 arch_counter_get_cntvct(void) 
	return cval;

}



static inline u64 __arch_counter_get_cntvct_stable(void)

{

	return __arch_counter_get_cntvct();

}



static inline u32 arch_timer_get_cntkctl(void)

{

	u32 cntkctl;

arch/arm/include/asm/cp15.h

+2 −0
Original line number Diff line number Diff line
@@ -68,6 +68,8 @@ 
#define BPIALL				__ACCESS_CP15(c7, 0, c5, 6)

#define ICIALLU				__ACCESS_CP15(c7, 0, c5, 0)



#define CNTVCT				__ACCESS_CP15_64(1, c14)



extern unsigned long cr_alignment;	/* defined in entry-armv.S */



static inline unsigned long get_cr(void)

arch/arm/vdso/vgettimeofday.c

+3 −2
Original line number Diff line number Diff line
@@ -18,9 +18,9 @@ 
#include <linux/compiler.h>

#include <linux/hrtimer.h>

#include <linux/time.h>

#include <asm/arch_timer.h>

#include <asm/barrier.h>

#include <asm/bug.h>

#include <asm/cp15.h>

#include <asm/page.h>

#include <asm/unistd.h>

#include <asm/vdso_datapage.h>
@@ -123,7 +123,8 @@ static notrace u64 get_ns(struct vdso_data *vdata) 
	u64 cycle_now;

	u64 nsec;



	cycle_now = arch_counter_get_cntvct();

	isb();

	cycle_now = read_sysreg(CNTVCT);



	cycle_delta = (cycle_now - vdata->cs_cycle_last) & vdata->cs_mask;

arch/arm64/Kconfig

+7 −5
Original line number Diff line number Diff line
@@ -477,15 +477,17 @@ config ARM64_ERRATUM_1024718 
	  If unsure, say Y.



config ARM64_ERRATUM_1188873

	bool "Cortex-A76: MRC read following MRRC read of specific Generic Timer in AArch32 might give incorrect result"

	bool "Cortex-A76/Neoverse-N1: MRC read following MRRC read of specific Generic Timer in AArch32 might give incorrect result"

	default y

	depends on COMPAT

	select ARM_ARCH_TIMER_OOL_WORKAROUND

	help

	  This option adds a workaround for ARM Cortex-A76 erratum 1188873.

	  This option adds a workaround for ARM Cortex-A76/Neoverse-N1

	  erratum 1188873.



	  Affected Cortex-A76 cores (r0p0, r1p0, r2p0) could cause

	  register corruption when accessing the timer registers from

	  AArch32 userspace.

	  Affected Cortex-A76/Neoverse-N1 cores (r0p0, r1p0, r2p0) could

	  cause register corruption when accessing the timer registers

	  from AArch32 userspace.



	  If unsure, say Y.

CRA Git | Maintained and supported by SUSTech CRA and CCSE