Commit 24ccfa06 authored May 24, 2015 by Paul Burton Committed by Ralf Baechle Jun 21, 2015

MIPS: JZ4740: support newer SoC interrupt controllers



Allow the interrupt controllers of the JZ4770, JZ4775 & JZ4780 SoCs to
be probed via devicetree, supporting the 64 interrupts they provide.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Brian Norris <computersforpeace@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/10155/


Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent 2da01884

arch/mips/jz4740/irq.c

+9 −0

Original line number	Diff line number	Diff line
		@@ -167,3 +167,12 @@ static int __init intc_1chip_of_init(struct device_node *node,
		return ingenic_intc_of_init(node, 1);
		}
		IRQCHIP_DECLARE(jz4740_intc, "ingenic,jz4740-intc", intc_1chip_of_init);

		static int __init intc_2chip_of_init(struct device_node *node,
		struct device_node *parent)
		{
		return ingenic_intc_of_init(node, 2);
		}
		IRQCHIP_DECLARE(jz4770_intc, "ingenic,jz4770-intc", intc_2chip_of_init);
		IRQCHIP_DECLARE(jz4775_intc, "ingenic,jz4775-intc", intc_2chip_of_init);
		IRQCHIP_DECLARE(jz4780_intc, "ingenic,jz4780-intc", intc_2chip_of_init);

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