Merge branch 'i2c/for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Required properties :

- compatible : Must be "atmel,at91rm9200-i2c", "atmel,at91sam9261-i2c",

     "atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", "atmel,at91sam9g10-i2c"

     or "atmel,at91sam9x5-i2c"

     "atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", "atmel,at91sam9g10-i2c",

     "atmel,at91sam9x5-i2c" or "atmel,sama5d2-i2c"

- reg: physical base address of the controller and length of memory mapped

     region.

- interrupts: interrupt number to the cpu.

Optional properties:

- clock-frequency: Desired I2C bus frequency in Hz, otherwise defaults to 100000

- dmas: A list of two dma specifiers, one for each entry in dma-names.

- dma-names: should contain "tx" and "rx".

- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO

  capable I2C controllers.

- Child nodes conforming to i2c bus binding

Examples :

		pagesize = <128>;

	}

}

i2c0: i2c@f8034600 {

	compatible = "atmel,sama5d2-i2c";

	reg = <0xf8034600 0x100>;

	interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;

	dmas = <&dma0

		(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))

		AT91_XDMAC_DT_PERID(11)>,

	       <&dma0

		(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))

		AT91_XDMAC_DT_PERID(12)>;

	dma-names = "tx", "rx";

	#address-cells = <1>;

	#size-cells = <0>;

	clocks = <&flx0>;

	atmel,fifo-size = <16>;

	wm8731: wm8731@1a {

		compatible = "wm8731";

		reg = <0x1a>;

	};

};

Broadcom stb bsc iic master controller

Required properties:

- compatible: should be "brcm,brcmstb-i2c"

- clock-frequency: 32-bit decimal value of iic master clock freqency in Hz

		   valid values are 375000, 390000, 187500, 200000

		   93750, 97500, 46875 and 50000

- reg: specifies the base physical address and size of the registers

Optional properties :

- interrupt-parent: specifies the phandle to the parent interrupt controller

  this one is cascaded from

- interrupts: specifies the interrupt number, the irq line to be used

- interrupt-names: Interrupt name string

Example:

bsca: i2c@f0406200 {

      clock-frequency = <390000>;

      compatible = "brcm,brcmstb-i2c";

      interrupt-parent = <&irq0_intc>;

      reg = <0xf0406200 0x58>;

      interrupts = <0x18>;

      interrupt-names = "upg_bsca";

};

* Mediatek's I2C controller

The Mediatek's I2C controller is used to interface with I2C devices.

Required properties:

  - compatible: value should be either of the following.

      (a) "mediatek,mt6577-i2c", for i2c compatible with mt6577 i2c.

      (b) "mediatek,mt6589-i2c", for i2c compatible with mt6589 i2c.

      (c) "mediatek,mt8127-i2c", for i2c compatible with mt8127 i2c.

      (d) "mediatek,mt8135-i2c", for i2c compatible with mt8135 i2c.

      (e) "mediatek,mt8173-i2c", for i2c compatible with mt8173 i2c.

  - reg: physical base address of the controller and dma base, length of memory

    mapped region.

  - interrupts: interrupt number to the cpu.

  - clock-div: the fixed value for frequency divider of clock source in i2c

    module. Each IC may be different.

  - clocks: clock name from clock manager

  - clock-names: Must include "main" and "dma", if enable have-pmic need include

    "pmic" extra.

Optional properties:

  - clock-frequency: Frequency in Hz of the bus when transfer, the default value

    is 100000.

  - mediatek,have-pmic: platform can control i2c form special pmic side.

    Only mt6589 and mt8135 support this feature.

  - mediatek,use-push-pull: IO config use push-pull mode.

Example:

	i2c0: i2c@1100d000 {

			compatible = "mediatek,mt6577-i2c";

			reg = <0x1100d000 0x70>,

			      <0x11000300 0x80>;

			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;

			clock-frequency = <400000>;

			mediatek,have-pmic;

			clock-div = <16>;

			clocks = <&i2c0_ck>, <&ap_dma_ck>;

			clock-names = "main", "dma";

	};

APM X-Gene SLIMpro Mailbox I2C Driver

An I2C controller accessed over the "SLIMpro" mailbox.

Required properties :

 - compatible : should be "apm,xgene-slimpro-i2c"

 - mboxes : use the label reference for the mailbox as the first parameter.

	    The second parameter is the channel number.

Example :

	i2cslimpro {

		compatible = "apm,xgene-slimpro-i2c";

		mboxes = <&mailbox 0>;

	};

by Wolfram Sang <wsa@sang-engineering.com> in 2014-15

Linux can also be an I2C slave in case I2C controllers have slave support.

Besides this HW requirement, one also needs a software backend providing the

actual functionality. An example for this is the slave-eeprom driver, which

acts as a dual memory driver. While another I2C master on the bus can access it

like a regular EEPROM, the Linux I2C slave can access the content via sysfs and

retrieve/provide information as needed. The software backend driver and the I2C

bus driver communicate via events. Here is a small graph visualizing the data

flow and the means by which data is transported. The dotted line marks only one

example. The backend could also use e.g. a character device, be in-kernel

only, or something completely different:

Linux can also be an I2C slave if the I2C controller in use has slave

functionality. For that to work, one needs slave support in the bus driver plus

a hardware independent software backend providing the actual functionality. An

example for the latter is the slave-eeprom driver, which acts as a dual memory

driver. While another I2C master on the bus can access it like a regular

EEPROM, the Linux I2C slave can access the content via sysfs and handle data as

needed. The backend driver and the I2C bus driver communicate via events. Here

is a small graph visualizing the data flow and the means by which data is

transported. The dotted line marks only one example. The backend could also

use a character device, be in-kernel only, or something completely different:

              e.g. sysfs        I2C slave events        I/O registers

Developer manual

================

First, the events which are used by the bus driver and the backend will be

described in detail. After that, some implementation hints for extending bus

drivers and writing backends will be given.

I2C slave events

----------------