Commit 240e176a authored Jul 09, 2020 by Florian Fainelli Committed by Marc Zyngier Jul 17, 2020

irqchip/brcmstb-l2: Match UPG_AUX_AON_INTR2 compatible



The UPG_AUX_AON_INTR2 Level 2 interrupt controller node is defined with
the "brcm,upg-aux-aon-l2-intc" compatible string in Device Tree and
behaves as an edge triggered standard Broadcom STB L2 interrupt
controller.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200709223016.989-7-f.fainelli@gmail.com

parent 03a7ac47

drivers/irqchip/irq-brcmstb-l2.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -278,6 +278,8 @@ static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np,
		IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,l2-intc", brcmstb_l2_edge_intc_of_init);
		IRQCHIP_DECLARE(brcmstb_hif_spi_l2_intc, "brcm,hif-spi-l2-intc",
		brcmstb_l2_edge_intc_of_init);
		IRQCHIP_DECLARE(brcmstb_upg_aux_aon_l2_intc, "brcm,upg-aux-aon-l2-intc",
		brcmstb_l2_edge_intc_of_init);

		static int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np,
		struct device_node *parent)

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