Unverified Commit 23cdddb2 authored Jun 28, 2019 by Jarkko Nikula Committed by Mark Brown Jul 02, 2019

spi: pxa2xx: Set minimum transfer speed



It is possible to request a transfer with a speed lower than supported
by the HW. This causes silent divider calculation underflow in
ssp_get_clk_div() which leads to a frequency higher than requested. Up to
maximum speed of the controller.

Set the minimum supported transfer speed and let the SPI core to
validate no transfers have speed lower than supported.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

parent 775c4c00

drivers/spi/spi-pxa2xx.c

+10 −0

Original line number	Diff line number	Diff line
		@@ -1704,6 +1704,16 @@ static int pxa2xx_spi_probe(struct platform_device *pdev)
		goto out_error_dma_irq_alloc;

		controller->max_speed_hz = clk_get_rate(ssp->clk);
		/*
		* Set minimum speed for all other platforms than Intel Quark which is
		* able do under 1 Hz transfers.
		*/
		if (!pxa25x_ssp_comp(drv_data))
		controller->min_speed_hz =
		DIV_ROUND_UP(controller->max_speed_hz, 4096);
		else if (!is_quark_x1000_ssp(drv_data))
		controller->min_speed_hz =
		DIV_ROUND_UP(controller->max_speed_hz, 512);

		/* Load default SSP configuration */
		pxa2xx_spi_write(drv_data, SSCR0, 0);

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