Commit 23c3960d authored by Stefan Agner's avatar Stefan Agner Committed by Linus Walleij
Browse files

pinctrl: freescale: imx: implement gpio_disable_free for Vybrid



The Freescale Vybrid SoC has GPIO capabilities as part of the
IOMUXC. To enable GPIO's, the gpio_request_enable callback has
been implemented, however the corsponding gpio_disable_free
callback is missing. So far, disabling (unexporting) a GPIO left
the pin in its last state.

Implement a proper gpio_disable_free function which clears the
three enable bits which influence the state (IBE, OBE and PUE).

Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent cc301fd1
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+26 −0
Original line number Diff line number Diff line
@@ -341,6 +341,31 @@ mux_pin:
	return 0;
}

static void imx_pmx_gpio_disable_free(struct pinctrl_dev *pctldev,
			struct pinctrl_gpio_range *range, unsigned offset)
{
	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
	const struct imx_pinctrl_soc_info *info = ipctl->info;
	const struct imx_pin_reg *pin_reg;
	u32 reg;

	/*
	 * Only Vybrid has the input/output buffer enable flags (IBE/OBE)
	 * They are part of the shared mux/conf register.
	 */
	if (!(info->flags & SHARE_MUX_CONF_REG))
		return;

	pin_reg = &info->pin_regs[offset];
	if (pin_reg->mux_reg == -1)
		return;

	/* Clear IBE/OBE/PUE to disable the pin (Hi-Z) */
	reg = readl(ipctl->base + pin_reg->mux_reg);
	reg &= ~0x7;
	writel(reg, ipctl->base + pin_reg->mux_reg);
}

static int imx_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
	   struct pinctrl_gpio_range *range, unsigned offset, bool input)
{
@@ -377,6 +402,7 @@ static const struct pinmux_ops imx_pmx_ops = {
	.get_function_groups = imx_pmx_get_groups,
	.set_mux = imx_pmx_set,
	.gpio_request_enable = imx_pmx_gpio_request_enable,
	.gpio_disable_free = imx_pmx_gpio_disable_free,
	.gpio_set_direction = imx_pmx_gpio_set_direction,
};