Commit 237483aa authored by Pratik Patel's avatar Pratik Patel Committed by Greg Kroah-Hartman
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coresight: stm: adding driver for CoreSight STM component 



This driver adds support for the STM CoreSight IP block, allowing any
system compoment (HW or SW) to log and aggregate messages via a
single entity.

The CoreSight STM exposes an application defined number of channels
called stimulus port.  Configuration is done using entries in sysfs
and channels made available to userspace via configfs.

Signed-off-by: default avatarPratik Patel <pratikp@codeaurora.org>
Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: default avatarMichael Williams <michael.williams@arm.com>
Signed-off-by: default avatarChunyan Zhang <zhang.chunyan@linaro.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 9eb93313

Documentation/ABI/testing/sysfs-bus-coresight-devices-stm

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What:		/sys/bus/coresight/devices/<memory_map>.stm/enable_source

Date:		April 2016

KernelVersion:	4.7

Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>

Description:	(RW) Enable/disable tracing on this specific trace macrocell.

		Enabling the trace macrocell implies it has been configured

		properly and a sink has been identified for it.  The path

		of coresight components linking the source to the sink is

		configured and managed automatically by the coresight framework.



What:		/sys/bus/coresight/devices/<memory_map>.stm/hwevent_enable

Date:		April 2016

KernelVersion:	4.7

Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>

Description:	(RW) Provides access to the HW event enable register, used in

		conjunction with HW event bank select register.



What:		/sys/bus/coresight/devices/<memory_map>.stm/hwevent_select

Date:		April 2016

KernelVersion:	4.7

Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>

Description:	(RW) Gives access to the HW event block select register

		(STMHEBSR) in order to configure up to 256 channels.  Used in

		conjunction with "hwevent_enable" register as described above.



What:		/sys/bus/coresight/devices/<memory_map>.stm/port_enable

Date:		April 2016

KernelVersion:	4.7

Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>

Description:	(RW) Provides access to the stimulus port enable register

		(STMSPER).  Used in conjunction with "port_select" described

		below.



What:		/sys/bus/coresight/devices/<memory_map>.stm/port_select

Date:		April 2016

KernelVersion:	4.7

Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>

Description:	(RW) Used to determine which bank of stimulus port bit in

		register STMSPER (see above) apply to.



What:		/sys/bus/coresight/devices/<memory_map>.stm/status

Date:		April 2016

KernelVersion:	4.7

Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>

Description:	(R) List various control and status registers.  The specific

		layout and content is driver specific.



What:		/sys/bus/coresight/devices/<memory_map>.stm/traceid

Date:		April 2016

KernelVersion:	4.7

Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>

Description:	(RW) Holds the trace ID that will appear in the trace stream

		coming from this trace entity.

Documentation/trace/coresight.txt

+35 −2
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@@ -190,8 +190,8 @@ expected to be accessed and controlled using those entries. 
Last but not least, "struct module *owner" is expected to be set to reflect

the information carried in "THIS_MODULE".



How to use

----------

How to use the tracer modules

-----------------------------



Before trace collection can start, a coresight sink needs to be identify.

There is no limit on the amount of sinks (nor sources) that can be enabled at
@@ -297,3 +297,36 @@ Info Tracing enabled 
Instruction     13570831        0x8026B584      E28DD00C        false   ADD      sp,sp,#0xc

Instruction     0       0x8026B588      E8BD8000        true    LDM      sp!,{pc}

Timestamp                                       Timestamp: 17107041535



How to use the STM module

-------------------------



Using the System Trace Macrocell module is the same as the tracers - the only

difference is that clients are driving the trace capture rather

than the program flow through the code.



As with any other CoreSight component, specifics about the STM tracer can be

found in sysfs with more information on each entry being found in [1]:



root@genericarmv8:~# ls /sys/bus/coresight/devices/20100000.stm

enable_source   hwevent_select  port_enable     subsystem       uevent

hwevent_enable  mgmt            port_select     traceid

root@genericarmv8:~#



Like any other source a sink needs to be identified and the STM enabled before

being used:



root@genericarmv8:~# echo 1 > /sys/bus/coresight/devices/20010000.etf/enable_sink

root@genericarmv8:~# echo 1 > /sys/bus/coresight/devices/20100000.stm/enable_source



From there user space applications can request and use channels using the devfs

interface provided for that purpose by the generic STM API:



root@genericarmv8:~# ls -l /dev/20100000.stm

crw-------    1 root     root       10,  61 Jan  3 18:11 /dev/20100000.stm

root@genericarmv8:~#



Details on how to use the generic STM API can be found here [2].



[1]. Documentation/ABI/testing/sysfs-bus-coresight-devices-stm

[2]. Documentation/trace/stm.txt

drivers/hwtracing/coresight/Kconfig

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@@ -78,4 +78,15 @@ config CORESIGHT_QCOM_REPLICATOR 
	  programmable ATB replicator sends the ATB trace stream from the

	  ETB/ETF to the TPIUi and ETR.



config CORESIGHT_STM

	bool "CoreSight System Trace Macrocell driver"

	depends on (ARM && !(CPU_32v3 || CPU_32v4 || CPU_32v4T)) || ARM64

	select CORESIGHT_LINKS_AND_SINKS

	select STM

	help

	  This driver provides support for hardware assisted software

	  instrumentation based tracing. This is primarily used for

	  logging useful software events or data coming from various entities

	  in the system, possibly running different OSs



endif

drivers/hwtracing/coresight/Makefile

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@@ -13,3 +13,4 @@ obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x.o coresight-etm-cp14.o \ 
obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x.o \

					coresight-etm4x-sysfs.o

obj-$(CONFIG_CORESIGHT_QCOM_REPLICATOR) += coresight-replicator-qcom.o

obj-$(CONFIG_CORESIGHT_STM) += coresight-stm.o

drivers/hwtracing/coresight/coresight-stm.c

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