Commit 2336f19d authored by Huazhong Tan's avatar Huazhong Tan Committed by David S. Miller
Browse files

net: hns3: check reset interrupt status when reset fails 



Currently, the reset interrupt will be cleared firstly, so when
reset fails, if interrupt status register has reset interrupt,
it means there is a new coming reset.

Fixes: 72e2fb07 ("net: hns3: clear reset interrupt status in hclge_irq_handle()")
Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
Reviewed-by: default avatarPeng Li <lipeng321@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c9765a89

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

+3 −4
Original line number Diff line number Diff line
@@ -3536,11 +3536,10 @@ static bool hclge_reset_err_handle(struct hclge_dev *hdev) 
		dev_info(&hdev->pdev->dev, "Reset pending %lu\n",

			 hdev->reset_pending);

		return true;

	} else if ((hdev->reset_type != HNAE3_IMP_RESET) &&

		   (hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG) &

		    BIT(HCLGE_IMP_RESET_BIT))) {

	} else if (hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_INT_STS) &

		   HCLGE_RESET_INT_M) {

		dev_info(&hdev->pdev->dev,

			 "reset failed because IMP Reset is pending\n");

			 "reset failed because new reset interrupt\n");

		hclge_clear_reset_cause(hdev);

		return false;

	} else if (hdev->reset_fail_cnt < MAX_RESET_FAIL_CNT) {

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h

+1 −0
Original line number Diff line number Diff line
@@ -164,6 +164,7 @@ enum HLCGE_PORT_TYPE { 
#define HCLGE_GLOBAL_RESET_BIT		0

#define HCLGE_CORE_RESET_BIT		1

#define HCLGE_IMP_RESET_BIT		2

#define HCLGE_RESET_INT_M		GENMASK(2, 0)

#define HCLGE_FUN_RST_ING		0x20C00

#define HCLGE_FUN_RST_ING_B		0

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