Commit 232bb01b authored Jan 21, 2020 by Dave Jiang Committed by Vinod Koul Jan 24, 2020

x86/asm: add iosubmit_cmds512() based on MOVDIR64B CPU instruction

With the introduction of MOVDIR64B instruction, there is now an instruction
that can write 64 bytes of data atomically.

Quoting from Intel SDM:
"There is no atomicity guarantee provided for the 64-byte load operation
from source address, and processor implementations may use multiple
load operations to read the 64-bytes. The 64-byte direct-store issued
by MOVDIR64B guarantees 64-byte write-completion atomicity. This means
that the data arrives at the destination in a single undivided 64-byte
write transaction."

We have identified at least 3 different use cases for this instruction in
the format of func(dst, src, count):
1) Clear poison / Initialize MKTME memory
@dst is normal memory.
@src in normal memory. Does not increment. (Copy same line to all
targets)
@count (to clear/init multiple lines)
2) Submit command(s) to new devices
@dst is a special MMIO region for a device. Does not increment.
@src is normal memory. Increments.
@count usually is 1, but can be multiple.
3) Copy to iomem in big chunks
@dst is iomem and increments
@src in normal memory and increments
@count is number of chunks to copy

Add support for case #2 to support device that will accept commands via
this instruction. We provide a @count in order to submit a batch of
preprogrammed descriptors in virtually contiguous memory. This
allows the caller to submit multiple descriptors to a device with a single
submission. The special device requires the entire 64bytes descriptor to
be written atomically and will accept MOVDIR64B instruction.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/157965022175.73301.10174614665472962675.stgit@djiang5-desk3.ch.intel.com

Signed-off-by: Vinod Koul <vkoul@kernel.org>

parent 6c0157be

arch/x86/include/asm/io.h

+36 −0

Original line number	Diff line number	Diff line
		@@ -399,4 +399,40 @@ extern bool arch_memremap_can_ram_remap(resource_size_t offset,
		extern bool phys_mem_access_encrypted(unsigned long phys_addr,
		unsigned long size);

		/**
		* iosubmit_cmds512 - copy data to single MMIO location, in 512-bit units
		* @__dst: destination, in MMIO space (must be 512-bit aligned)
		* @src: source
		* @count: number of 512 bits quantities to submit
		*
		* Submit data from kernel space to MMIO space, in units of 512 bits at a
		* time. Order of access is not guaranteed, nor is a memory barrier
		* performed afterwards.
		*
		* Warning: Do not use this helper unless your driver has checked that the CPU
		* instruction is supported on the platform.
		*/
		static inline void iosubmit_cmds512(void __iomem __dst, const void src,
		size_t count)
		{
		/*
		* Note that this isn't an "on-stack copy", just definition of "dst"
		* as a pointer to 64-bytes of stuff that is going to be overwritten.
		* In the MOVDIR64B case that may be needed as you can use the
		* MOVDIR64B instruction to copy arbitrary memory around. This trick
		* lets the compiler know how much gets clobbered.
		*/
		volatile struct { char _[64]; } *dst = __dst;
		const u8 *from = src;
		const u8 end = from + count 64;

		while (from < end) {
		/* MOVDIR64B [rdx], rax */
		asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02"
		: "=m" (dst)
		: "d" (from), "a" (dst));
		from += 64;
		}
		}

		#endif /* _ASM_X86_IO_H */

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