clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary (2303a9ca) · Commits · 戴 / test

drivers/clk/meson/axg.c

+0 −1

Original line number	Diff line number	Diff line
		@@ -106,7 +106,6 @@ static struct clk_regmap axg_sys_pll = {
		.ops = &meson_clk_pll_ro_ops,
		.parent_names = (const char *[]){ "xtal" },
		.num_parents = 1,
		.flags = CLK_GET_RATE_NOCACHE,
		},
		};

+8 −4

Original line number	Diff line number	Diff line
		@@ -218,7 +218,6 @@ static struct clk_regmap gxbb_fixed_pll = {
		.ops = &meson_clk_pll_ro_ops,
		.parent_names = (const char *[]){ "xtal" },
		.num_parents = 1,
		.flags = CLK_GET_RATE_NOCACHE,
		},
		};

		@@ -286,6 +285,10 @@ static struct clk_regmap gxbb_hdmi_pll = {
		.ops = &meson_clk_pll_ro_ops,
		.parent_names = (const char *[]){ "hdmi_pll_pre_mult" },
		.num_parents = 1,
		/*
		* Display directly handle hdmi pll registers ATM, we need
		* NOCACHE to keep our view of the clock as accurate as possible
		*/
		.flags = CLK_GET_RATE_NOCACHE,
		},
		};
		@@ -349,6 +352,10 @@ static struct clk_regmap gxl_hdmi_pll = {
		.ops = &meson_clk_pll_ro_ops,
		.parent_names = (const char *[]){ "xtal" },
		.num_parents = 1,
		/*
		* Display directly handle hdmi pll registers ATM, we need
		* NOCACHE to keep our view of the clock as accurate as possible
		*/
		.flags = CLK_GET_RATE_NOCACHE,
		},
		};
		@@ -391,7 +398,6 @@ static struct clk_regmap gxbb_sys_pll = {
		.ops = &meson_clk_pll_ro_ops,
		.parent_names = (const char *[]){ "xtal" },
		.num_parents = 1,
		.flags = CLK_GET_RATE_NOCACHE,
		},
		};

		@@ -442,7 +448,6 @@ static struct clk_regmap gxbb_gp0_pll = {
		.ops = &meson_clk_pll_ops,
		.parent_names = (const char *[]){ "xtal" },
		.num_parents = 1,
		.flags = CLK_GET_RATE_NOCACHE,
		},
		};

		@@ -500,7 +505,6 @@ static struct clk_regmap gxl_gp0_pll = {
		.ops = &meson_clk_pll_ops,
		.parent_names = (const char *[]){ "xtal" },
		.num_parents = 1,
		.flags = CLK_GET_RATE_NOCACHE,
		},
		};

+0 −3

Original line number	Diff line number	Diff line
		@@ -137,7 +137,6 @@ static struct clk_regmap meson8b_fixed_pll = {
		.ops = &meson_clk_pll_ro_ops,
		.parent_names = (const char *[]){ "xtal" },
		.num_parents = 1,
		.flags = CLK_GET_RATE_NOCACHE,
		},
		};

		@@ -179,7 +178,6 @@ static struct clk_regmap meson8b_vid_pll = {
		.ops = &meson_clk_pll_ro_ops,
		.parent_names = (const char *[]){ "xtal" },
		.num_parents = 1,
		.flags = CLK_GET_RATE_NOCACHE,
		},
		};

		@@ -222,7 +220,6 @@ static struct clk_regmap meson8b_sys_pll = {
		.ops = &meson_clk_pll_ro_ops,
		.parent_names = (const char *[]){ "xtal" },
		.num_parents = 1,
		.flags = CLK_GET_RATE_NOCACHE,
		},
		};