Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm (22fbc037) · Commits · 戴 / test

arch/arm64/kvm/hyp/nvhe/tlb.c

+7 −0

Original line number	Diff line number	Diff line
		@@ -31,7 +31,14 @@ static void __tlb_switch_to_guest(struct kvm_s2_mmu *mmu,
		isb();
		}

		/*
		* __load_guest_stage2() includes an ISB only when the AT
		* workaround is applied. Take care of the opposite condition,
		* ensuring that we always have an ISB, but not two ISBs back
		* to back.
		*/
		__load_guest_stage2(mmu);
		asm(ALTERNATIVE("isb", "nop", ARM64_WORKAROUND_SPECULATIVE_AT));
		}

		static void __tlb_switch_to_host(struct tlb_inv_context *cxt)

+12 −10

Original line number	Diff line number	Diff line
		@@ -794,6 +794,18 @@ void update_exception_bitmap(struct kvm_vcpu *vcpu)
		*/
		if (is_guest_mode(vcpu))
		eb \|= get_vmcs12(vcpu)->exception_bitmap;
		else {
		/*
		* If EPT is enabled, #PF is only trapped if MAXPHYADDR is mismatched
		* between guest and host. In that case we only care about present
		* faults. For vmcs02, however, PFEC_MASK and PFEC_MATCH are set in
		* prepare_vmcs02_rare.
		*/
		bool selective_pf_trap = enable_ept && (eb & (1u << PF_VECTOR));
		int mask = selective_pf_trap ? PFERR_PRESENT_MASK : 0;
		vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, mask);
		vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, mask);
		}

		vmcs_write32(EXCEPTION_BITMAP, eb);
		}
		@@ -4355,16 +4367,6 @@ static void init_vmcs(struct vcpu_vmx *vmx)
		vmx->pt_desc.guest.output_mask = 0x7F;
		vmcs_write64(GUEST_IA32_RTIT_CTL, 0);
		}

		/*
		* If EPT is enabled, #PF is only trapped if MAXPHYADDR is mismatched
		* between guest and host. In that case we only care about present
		* faults.
		*/
		if (enable_ept) {
		vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, PFERR_PRESENT_MASK);
		vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, PFERR_PRESENT_MASK);
		}
		}

		static void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)