Commit 229f31e2 authored by Lucas De Marchi's avatar Lucas De Marchi
Browse files

drm/i915/dg1: add hpd interrupt handling 



DG1 has one more combo phy port, no TC and all irq handling goes through
SDE, like for MCC.

v2: Also change intel_hpd_pin_default() to include DG1 mapping
v3, v4: Rebase on hpd refactor

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201021082034.3170478-2-lucas.demarchi@intel.com
parent 71c1a499

drivers/gpu/drm/i915/display/intel_ddi.c

+12 −1
Original line number Diff line number Diff line
@@ -5066,6 +5066,15 @@ static bool hti_uses_phy(struct drm_i915_private *i915, enum phy phy) 
		 i915->hti_state & HDPORT_PHY_USED_HDMI(phy));

}



static enum hpd_pin dg1_hpd_pin(struct drm_i915_private *dev_priv,

				enum port port)

{

	if (port >= PORT_D)

		return HPD_PORT_C + port - PORT_D;

	else

		return HPD_PORT_A + port - PORT_A;

}



static enum hpd_pin tgl_hpd_pin(struct drm_i915_private *dev_priv,

				enum port port)

{
@@ -5195,7 +5204,9 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) 
	encoder->cloneable = 0;

	encoder->pipe_mask = ~0;



	if (IS_ROCKETLAKE(dev_priv))

	if (IS_DG1(dev_priv))

		encoder->hpd_pin = dg1_hpd_pin(dev_priv, port);

	else if (IS_ROCKETLAKE(dev_priv))

		encoder->hpd_pin = rkl_hpd_pin(dev_priv, port);

	else if (INTEL_GEN(dev_priv) >= 12)

		encoder->hpd_pin = tgl_hpd_pin(dev_priv, port);

drivers/gpu/drm/i915/i915_irq.c

+31 −6
Original line number Diff line number Diff line
@@ -152,6 +152,13 @@ static const u32 hpd_icp[HPD_NUM_PINS] = { 
	[HPD_PORT_TC6] = SDE_TC_HOTPLUG_ICP(PORT_TC6),

};



static const u32 hpd_sde_dg1[HPD_NUM_PINS] = {

	[HPD_PORT_A] = SDE_DDI_HOTPLUG_ICP(PORT_A),

	[HPD_PORT_B] = SDE_DDI_HOTPLUG_ICP(PORT_B),

	[HPD_PORT_C] = SDE_DDI_HOTPLUG_ICP(PORT_C),

	[HPD_PORT_D] = SDE_DDI_HOTPLUG_ICP(PORT_D),

};



static void intel_hpd_init_pins(struct drm_i915_private *dev_priv)

{

	struct i915_hotplug *hpd = &dev_priv->hotplug;
@@ -176,10 +183,13 @@ static void intel_hpd_init_pins(struct drm_i915_private *dev_priv) 
	else

		hpd->hpd = hpd_ilk;



	if (!HAS_PCH_SPLIT(dev_priv) || HAS_PCH_NOP(dev_priv))

	if ((INTEL_PCH_TYPE(dev_priv) < PCH_DG1) &&

	    (!HAS_PCH_SPLIT(dev_priv) || HAS_PCH_NOP(dev_priv)))

		return;



	if (HAS_PCH_TGP(dev_priv) || HAS_PCH_JSP(dev_priv) ||

	if (HAS_PCH_DG1(dev_priv))

		hpd->pch_hpd = hpd_sde_dg1;

	else if (HAS_PCH_TGP(dev_priv) || HAS_PCH_JSP(dev_priv) ||

		 HAS_PCH_ICP(dev_priv) || HAS_PCH_MCC(dev_priv))

		hpd->pch_hpd = hpd_icp;

	else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_SPT(dev_priv))
@@ -1071,6 +1081,8 @@ static bool icp_ddi_port_hotplug_long_detect(enum hpd_pin pin, u32 val) 
		return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(PORT_B);

	case HPD_PORT_C:

		return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(PORT_C);

	case HPD_PORT_D:

		return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(PORT_D);

	default:

		return false;

	}
@@ -1861,7 +1873,10 @@ static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir) 
	u32 ddi_hotplug_trigger, tc_hotplug_trigger;

	u32 pin_mask = 0, long_mask = 0;



	if (HAS_PCH_TGP(dev_priv)) {

	if (HAS_PCH_DG1(dev_priv)) {

		ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_DG1;

		tc_hotplug_trigger = 0;

	} else if (HAS_PCH_TGP(dev_priv)) {

		ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_TGP;

		tc_hotplug_trigger = pch_iir & SDE_TC_MASK_TGP;

	} else if (HAS_PCH_JSP(dev_priv)) {
@@ -3251,6 +3266,12 @@ static void jsp_hpd_irq_setup(struct drm_i915_private *dev_priv) 
			  TGP_DDI_HPD_ENABLE_MASK, 0);

}



static void dg1_hpd_irq_setup(struct drm_i915_private *dev_priv)

{

	icp_hpd_irq_setup(dev_priv,

			  DG1_DDI_HPD_ENABLE_MASK, 0);

}



static void gen11_hpd_detection_setup(struct drm_i915_private *dev_priv)

{

	u32 hotplug;
@@ -3636,7 +3657,9 @@ static void icp_irq_postinstall(struct drm_i915_private *dev_priv) 
	gen3_assert_iir_is_zero(&dev_priv->uncore, SDEIIR);

	I915_WRITE(SDEIMR, ~mask);



	if (HAS_PCH_TGP(dev_priv)) {

	if (HAS_PCH_DG1(dev_priv))

		icp_ddi_hpd_detection_setup(dev_priv, DG1_DDI_HPD_ENABLE_MASK);

	else if (HAS_PCH_TGP(dev_priv)) {

		icp_ddi_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK);

		icp_tc_hpd_detection_setup(dev_priv, TGP_TC_HPD_ENABLE_MASK);

	} else if (HAS_PCH_JSP(dev_priv)) {
@@ -4156,7 +4179,9 @@ void intel_irq_init(struct drm_i915_private *dev_priv) 
		if (I915_HAS_HOTPLUG(dev_priv))

			dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup;

	} else {

		if (HAS_PCH_JSP(dev_priv))

		if (HAS_PCH_DG1(dev_priv))

			dev_priv->display.hpd_irq_setup = dg1_hpd_irq_setup;

		else if (HAS_PCH_JSP(dev_priv))

			dev_priv->display.hpd_irq_setup = jsp_hpd_irq_setup;

		else if (HAS_PCH_MCC(dev_priv))

			dev_priv->display.hpd_irq_setup = mcc_hpd_irq_setup;

drivers/gpu/drm/i915/i915_reg.h

+8 −0
Original line number Diff line number Diff line
@@ -8365,6 +8365,10 @@ enum { 
					 SDE_TC_HOTPLUG_ICP(PORT_TC3) | \

					 SDE_TC_HOTPLUG_ICP(PORT_TC2) | \

					 SDE_TC_HOTPLUG_ICP(PORT_TC1))

#define SDE_DDI_MASK_DG1		(SDE_DDI_HOTPLUG_ICP(PORT_D) | \

					 SDE_DDI_HOTPLUG_ICP(PORT_C) | \

					 SDE_DDI_HOTPLUG_ICP(PORT_B) | \

					 SDE_DDI_HOTPLUG_ICP(PORT_A))



#define SDEISR  _MMIO(0xc4000)

#define SDEIMR  _MMIO(0xc4004)
@@ -8459,6 +8463,10 @@ enum { 
#define TGP_TC_HPD_ENABLE_MASK		(ICP_TC_HPD_ENABLE(PORT_TC6) | \

					 ICP_TC_HPD_ENABLE(PORT_TC5) | \

					 ICP_TC_HPD_ENABLE_MASK)

#define DG1_DDI_HPD_ENABLE_MASK		(SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_D) | \

					 SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_C) | \

					 SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_B) | \

					 SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_A))



#define _PCH_DPLL_A              0xc6014

#define _PCH_DPLL_B              0xc6018

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