Commit 226be92b authored by Viresh Kumar's avatar Viresh Kumar Committed by Daniel Lezcano
Browse files

clockevents/drivers/dw_apb: Migrate to new 'set-state' interface 



Migrate dw_apb driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
parent 5c78b265

drivers/clocksource/dw_apb_timer.c

+81 −62
Original line number Diff line number Diff line
@@ -110,37 +110,28 @@ static void apbt_enable_int(struct dw_apb_timer *timer) 
	apbt_writel(timer, ctrl, APBTMR_N_CONTROL);

}



static void apbt_set_mode(enum clock_event_mode mode,

			  struct clock_event_device *evt)

static int apbt_shutdown(struct clock_event_device *evt)

{

	unsigned long ctrl;

	unsigned long period;

	struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt);

	unsigned long ctrl;



	pr_debug("%s CPU %d mode=%d\n", __func__,

		 cpumask_first(evt->cpumask),

		 mode);

	pr_debug("%s CPU %d state=shutdown\n", __func__,

		 cpumask_first(evt->cpumask));



	switch (mode) {

	case CLOCK_EVT_MODE_PERIODIC:

		period = DIV_ROUND_UP(dw_ced->timer.freq, HZ);

	ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL);

		ctrl |= APBTMR_CONTROL_MODE_PERIODIC;

		apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);

		/*

		 * DW APB p. 46, have to disable timer before load counter,

		 * may cause sync problem.

		 */

	ctrl &= ~APBTMR_CONTROL_ENABLE;

	apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);

		udelay(1);

		pr_debug("Setting clock period %lu for HZ %d\n", period, HZ);

		apbt_writel(&dw_ced->timer, period, APBTMR_N_LOAD_COUNT);

		ctrl |= APBTMR_CONTROL_ENABLE;

		apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);

		break;

	return 0;

}



static int apbt_set_oneshot(struct clock_event_device *evt)

{

	struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt);

	unsigned long ctrl;



	pr_debug("%s CPU %d state=oneshot\n", __func__,

		 cpumask_first(evt->cpumask));



	case CLOCK_EVT_MODE_ONESHOT:

	ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL);

	/*

	 * set free running mode, this mode will let timer reload max
@@ -162,19 +153,44 @@ static void apbt_set_mode(enum clock_event_mode mode, 
	ctrl &= ~APBTMR_CONTROL_INT;

	ctrl |= APBTMR_CONTROL_ENABLE;

	apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);

		break;

	return 0;

}



static int apbt_set_periodic(struct clock_event_device *evt)

{

	struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt);

	unsigned long period = DIV_ROUND_UP(dw_ced->timer.freq, HZ);

	unsigned long ctrl;



	pr_debug("%s CPU %d state=periodic\n", __func__,

		 cpumask_first(evt->cpumask));



	case CLOCK_EVT_MODE_UNUSED:

	case CLOCK_EVT_MODE_SHUTDOWN:

	ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL);

	ctrl |= APBTMR_CONTROL_MODE_PERIODIC;

	apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);

	/*

	 * DW APB p. 46, have to disable timer before load counter,

	 * may cause sync problem.

	 */

	ctrl &= ~APBTMR_CONTROL_ENABLE;

	apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);

		break;

	udelay(1);

	pr_debug("Setting clock period %lu for HZ %d\n", period, HZ);

	apbt_writel(&dw_ced->timer, period, APBTMR_N_LOAD_COUNT);

	ctrl |= APBTMR_CONTROL_ENABLE;

	apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);

	return 0;

}



static int apbt_resume(struct clock_event_device *evt)

{

	struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt);



	pr_debug("%s CPU %d state=resume\n", __func__,

		 cpumask_first(evt->cpumask));



	case CLOCK_EVT_MODE_RESUME:

	apbt_enable_int(&dw_ced->timer);

		break;

	}

	return 0;

}



static int apbt_next_event(unsigned long delta,
@@ -233,7 +249,10 @@ dw_apb_clockevent_init(int cpu, const char *name, unsigned rating, 
	dw_ced->ced.min_delta_ns = clockevent_delta2ns(5000, &dw_ced->ced);

	dw_ced->ced.cpumask = cpumask_of(cpu);

	dw_ced->ced.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;

	dw_ced->ced.set_mode = apbt_set_mode;

	dw_ced->ced.set_state_shutdown = apbt_shutdown;

	dw_ced->ced.set_state_periodic = apbt_set_periodic;

	dw_ced->ced.set_state_oneshot = apbt_set_oneshot;

	dw_ced->ced.tick_resume = apbt_resume;

	dw_ced->ced.set_next_event = apbt_next_event;

	dw_ced->ced.irq = dw_ced->timer.irq;

	dw_ced->ced.rating = rating;

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