Commit 22381d08 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'imx-dt64-4.10' of...

Merge tag 'imx-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64

Freescale arm64 device tree updates for 4.10:
 - Enable Thermal Monitoring Unit (TMU) for thermal management on
   LS1043A and LS2080A.
 - Add support for LS1046A SoC, which has similar peripherals as
   LS1043A but integrates 4 A72 cores.
 - Add two LS1046A based board support: LS1046A-QDS and LS1046A-RDB.

* tag 'imx-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux

:
  arm64: dts: ls2080a: Add TMU device tree support for LS2080A
  arm64: dts: ls1043a: Add TMU device tree support for LS1043A
  arm64: dts: add LS1046A-QDS board support
  Documentation: DT: Add entry for QorIQ LS1046A-QDS board
  arm64: dts: add LS1046A-RDB board support
  Documentation: DT: Add entry for QorIQ LS1046A-RDB board
  arm64: dts: add QorIQ LS1046A SoC support
  dt-bindings: ahci-fsl-qoriq: updated for SoC ls1046a
  dt-bindings: qoriq-clock: add LS1043A/LS1046A/LS2080A compatible for clockgen
  dt-bindings: i2c: adds two more nxp devices
  dt-bindings: fsl: add LS1043A/LS1046A/LS2080A compatible for SCFG and DCFG
  dt-bindings: fsl: Add LS1043A/LS1046A/LS2080A SoC compatible strings

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents eed67c99 236f794e
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+31 −3
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@@ -97,7 +97,7 @@ Freescale LS1021A Platform Device Tree Bindings
Required root node compatible properties:
  - compatible = "fsl,ls1021a";

Freescale LS1021A SoC-specific Device Tree Bindings
Freescale SoC-specific Device Tree Bindings
-------------------------------------------

Freescale SCFG
@@ -105,7 +105,11 @@ Freescale SCFG
configuration and status registers for the chip. Such as getting PEX port
status.
  Required properties:
  - compatible: should be "fsl,ls1021a-scfg"
  - compatible: Should contain a chip-specific compatible string,
	Chip-specific strings are of the form "fsl,<chip>-scfg",
	The following <chip>s are known to be supported:
	ls1021a, ls1043a, ls1046a, ls2080a.

  - reg: should contain base address and length of SCFG memory-mapped registers

Example:
@@ -119,7 +123,11 @@ Freescale DCFG
configuration and status for the device. Such as setting the secondary
core start address and release the secondary core from holdoff and startup.
  Required properties:
  - compatible: should be "fsl,ls1021a-dcfg"
  - compatible: Should contain a chip-specific compatible string,
	Chip-specific strings are of the form "fsl,<chip>-dcfg",
	The following <chip>s are known to be supported:
	ls1021a, ls1043a, ls1046a, ls2080a.

  - reg : should contain base address and length of DCFG memory-mapped registers

Example:
@@ -131,6 +139,10 @@ Example:
Freescale ARMv8 based Layerscape SoC family Device Tree Bindings
----------------------------------------------------------------

LS1043A SoC
Required root node properties:
    - compatible = "fsl,ls1043a";

LS1043A ARMv8 based RDB Board
Required root node properties:
    - compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
@@ -139,6 +151,22 @@ LS1043A ARMv8 based QDS Board
Required root node properties:
    - compatible = "fsl,ls1043a-qds", "fsl,ls1043a";

LS1046A SoC
Required root node properties:
    - compatible = "fsl,ls1046a";

LS1046A ARMv8 based QDS Board
Required root node properties:
    - compatible = "fsl,ls1046a-qds", "fsl,ls1046a";

LS1046A ARMv8 based RDB Board
Required root node properties:
    - compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";

LS2080A SoC
Required root node properties:
    - compatible = "fsl,ls2080a";

LS2080A ARMv8 based Simulator model
Required root node properties:
    - compatible = "fsl,ls2080a-simu", "fsl,ls2080a";
+1 −1
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@@ -3,7 +3,7 @@ Binding for Freescale QorIQ AHCI SATA Controller
Required properties:
  - reg: Physical base address and size of the controller's register area.
  - compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where
    chip could be ls1021a, ls2080a, ls1043a etc.
    chip could be ls1021a, ls1043a, ls1046a, ls2080a etc.
  - clocks: Input clock specifier. Refer to common clock bindings.
  - interrupts: Interrupt specifier. Refer to interrupt binding.

+3 −0
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@@ -32,6 +32,9 @@ Required properties:
	* "fsl,b4420-clockgen"
	* "fsl,b4860-clockgen"
	* "fsl,ls1021a-clockgen"
	* "fsl,ls1043a-clockgen"
	* "fsl,ls1046a-clockgen"
	* "fsl,ls2080a-clockgen"
	Chassis-version clock strings include:
	* "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks
	* "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks
+2 −0
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@@ -130,6 +130,8 @@ nuvoton,npct501 i2c trusted platform module (TPM)
nuvoton,npct601		i2c trusted platform module (TPM2)
nxp,pca9556		Octal SMBus and I2C registered interface
nxp,pca9557		8-bit I2C-bus and SMBus I/O port with reset
nxp,pcf2127		Real-time clock
nxp,pcf2129		Real-time clock
nxp,pcf8563		Real-time clock/calendar
nxp,pcf85063		Tiny Real-Time Clock
oki,ml86v7667		OKI ML86V7667 video decoder
+2 −0
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dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
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