ath9k_hw: Add functions to get/set antenna diversity configuration (21cc630f) · Commits · 戴 / test

drivers/net/wireless/ath/ath9k/ar9002_phy.c

+35 −0

Original line number	Diff line number	Diff line
		@@ -530,3 +530,38 @@ void ar9002_hw_attach_phy_ops(struct ath_hw *ah)

		ar9002_hw_set_nf_limits(ah);
		}

		void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
		struct ath_hw_antcomb_conf *antconf)
		{
		u32 regval;

		regval = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
		antconf->main_lna_conf = (regval & AR_PHY_9285_ANT_DIV_MAIN_LNACONF) >>
		AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S;
		antconf->alt_lna_conf = (regval & AR_PHY_9285_ANT_DIV_ALT_LNACONF) >>
		AR_PHY_9285_ANT_DIV_ALT_LNACONF_S;
		antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >>
		AR_PHY_9285_FAST_DIV_BIAS_S;
		}
		EXPORT_SYMBOL(ath9k_hw_antdiv_comb_conf_get);

		void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah,
		struct ath_hw_antcomb_conf *antconf)
		{
		u32 regval;

		regval = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
		regval &= ~(AR_PHY_9285_ANT_DIV_MAIN_LNACONF \|
		AR_PHY_9285_ANT_DIV_ALT_LNACONF \|
		AR_PHY_9285_FAST_DIV_BIAS);
		regval \|= ((antconf->main_lna_conf << AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S)
		& AR_PHY_9285_ANT_DIV_MAIN_LNACONF);
		regval \|= ((antconf->alt_lna_conf << AR_PHY_9285_ANT_DIV_ALT_LNACONF_S)
		& AR_PHY_9285_ANT_DIV_ALT_LNACONF);
		regval \|= ((antconf->fast_div_bias << AR_PHY_9285_FAST_DIV_BIAS_S)
		& AR_PHY_9285_FAST_DIV_BIAS);

		REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regval);
		}
		EXPORT_SYMBOL(ath9k_hw_antdiv_comb_conf_set);

+2 −0

Original line number	Diff line number	Diff line
		@@ -302,6 +302,8 @@
		#define AR_PHY_NEW_ADC_DC_OFFSET_CORR_ENABLE 0x80000000

		#define AR_PHY_MULTICHAIN_GAIN_CTL 0x99ac
		#define AR_PHY_9285_FAST_DIV_BIAS 0x00007E00
		#define AR_PHY_9285_FAST_DIV_BIAS_S 9
		#define AR_PHY_9285_ANT_DIV_CTL_ALL 0x7f000000
		#define AR_PHY_9285_ANT_DIV_CTL 0x01000000
		#define AR_PHY_9285_ANT_DIV_CTL_S 24

+10 −0

Original line number	Diff line number	Diff line
		@@ -496,6 +496,12 @@ struct ath_gen_timer_table {
		} timer_mask;
		};

		struct ath_hw_antcomb_conf {
		u8 main_lna_conf;
		u8 alt_lna_conf;
		u8 fast_div_bias;
		};

		/**
		* struct ath_hw_private_ops - callbacks used internally by hardware code
		*
		@@ -889,6 +895,10 @@ void ath9k_hw_cfg_output(struct ath_hw *ah, u32 gpio,
		void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val);
		u32 ath9k_hw_getdefantenna(struct ath_hw *ah);
		void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna);
		void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
		struct ath_hw_antcomb_conf *antconf);
		void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah,
		struct ath_hw_antcomb_conf *antconf);

		/* General Operation */
		bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);