Commit 21539939 authored by Suzuki K. Poulose's avatar Suzuki K. Poulose Committed by Catalin Marinas
Browse files

arm64: 36 bit VA 



36bit VA lets us use 2 level page tables while limiting the
available address space to 64GB.

Cc: Will Deacon <will.deacon@arm.com>
Cc: Steve Capper <steve.capper@linaro.org>
Signed-off-by: default avatarSuzuki K. Poulose <suzuki.poulose@arm.com>
Reviewed-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 44eaacf1

arch/arm64/Kconfig

+7 −1
Original line number Diff line number Diff line
@@ -170,6 +170,7 @@ config FIX_EARLYCON_MEM 


config PGTABLE_LEVELS

	int

	default 2 if ARM64_16K_PAGES && ARM64_VA_BITS_36

	default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42

	default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48

	default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
@@ -391,6 +392,10 @@ choice 
	  space sizes. The level of translation table is determined by

	  a combination of page size and virtual address space size.



config ARM64_VA_BITS_36

	bool "36-bit"

	depends on ARM64_16K_PAGES



config ARM64_VA_BITS_39

	bool "39-bit"

	depends on ARM64_4K_PAGES
@@ -410,6 +415,7 @@ endchoice 


config ARM64_VA_BITS

	int

	default 36 if ARM64_VA_BITS_36

	default 39 if ARM64_VA_BITS_39

	default 42 if ARM64_VA_BITS_42

	default 47 if ARM64_VA_BITS_47
@@ -480,7 +486,7 @@ config ARCH_WANT_GENERAL_HUGETLB 
	def_bool y



config ARCH_WANT_HUGE_PMD_SHARE

	def_bool y if ARM64_4K_PAGES || ARM64_16K_PAGES

	def_bool y if ARM64_4K_PAGES || (ARM64_16K_PAGES && !ARM64_VA_BITS_36)



config HAVE_ARCH_TRANSPARENT_HUGEPAGE

	def_bool y

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