Commit 2140eaf2 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'stm32-dt-for-v5.2-1' of...

Merge tag 'stm32-dt-for-v5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.2, round 1

Highlights:
----------

MPU part:
 - Add initial support of stm32mp157a-dk1 board:
   This board embeds a STM32MP157a SOC with AC package (TFBGA361, 148 ios)
   and 512MB of DDR3. Several connections are available on this boards:
   4*USB2.0, 1*USB2.0 typeC, SDcard, RJ45, HDMI, Arduino connector, ...

 - Add initial support of stm32mp157c-dk2 board:
   This board is a "super-set" of stm32mp157a-dk1. It embeds a STM32MP157c SOC
   with AC package (TFBGA361, 148 ios) and 512MB of DDR3. Same connections
   than stm32mp157a-dk1 board are available. Display panel (otm8009a) and
   Murata wifi/BT combo is added.

 - Add and enable SD card support (MMCI variant) on stm32mp157c-ed1/ev1 and
   on stm32mp157a-dk1/dk2 boards.

 - Add and enable PMIC support (STPMIC1 chip) on stm32mp157c-ed1/ev1 and
   on stm32mp157a-dk1/dk2 boards.

 - Add and enable IPCC mailbox support on stm32mp157c-ed1/ev1 and
   on stm32mp157a-dk1/dk2 boards.

 - Add sysconfig clock support on stm32mp157c.
 - Add romem and temperature calibration support on stm32mp157c.
 - Add SPDIFRX support on stm32mp157c.
 - Enable CEC on stm32mp157a-dk1/dk2.

MCU part:
 - Add and enable SD card support (MMCI variant) on stm32h743 eval and disco
   boards.
 - Add romem and temperature calibration support on stm32f429
   (and so stm32f469).
 - Enable stm32f769 clock driver

* tag 'stm32-dt-for-v5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32

: (24 commits)
  ARM: dts: stm32: enable cec on stm32mp157a-dk1 board
  ARM: dts: stm32: add cec pins muxing on stm32mp157
  ARM: dts: stm32: add ltdc pins muxing on stm32mp157
  ARM: dts: stm32: add I2C sleep pins muxing on stm32mp157
  ARM: dts: stm32: add power supply of otm8009a on stm32mp157c-dk2
  ARM: dts: stm32: Enable STM32F769 clock driver
  ARM: dts: stm32: add stpmic1 support on stm32mp157a dk1 board
  ARM: dts: stm32: add stpmic1 support on stm32mp157c ed1 board
  ARM: dts: stm32: add spdfirx pins to stm32mp157c
  ARM: dts: stm32: add spdifrx support on stm32mp157c
  ARM: dts: stm32: Add romem and temperature calibration on stm32f429
  ARM: dts: stm32: Add romem and temperature calibration on stm32mp157c
  ARM: dts: stm32: Add clock on stm32mp157c syscfg
  ARM: dts: stm32: enable IPCC mailbox support on STM32MP157a-dk1
  ARM: dts: stm32: enable IPCC mailbox support on STM32MP157c-ed1
  ARM: dts: stm32: add IPCC mailbox support on STM32MP157c
  ARM: dts: stm32: add sdmmc1 support on stm32mp157a dk1 board
  ARM: dts: stm32: add sdmmc1 support on stm32mp157c ed1 board
  ARM: dts: stm32: add sdmmc1 support on stm32mp157c
  ARM: dts: stm32: add sdmmc1 support on stm32h743i disco board
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents bbf7499d 3fca6a1a
Loading
Loading
Loading
Loading
+2 −0
Original line number Diff line number Diff line
@@ -965,6 +965,8 @@ dtb-$(CONFIG_ARCH_STM32) += \
	stm32746g-eval.dtb \
	stm32h743i-eval.dtb \
	stm32h743i-disco.dtb \
	stm32mp157a-dk1.dtb \
	stm32mp157c-dk2.dtb \
	stm32mp157c-ed1.dtb \
	stm32mp157c-ev1.dtb
dtb-$(CONFIG_MACH_SUN4I) += \
+13 −0
Original line number Diff line number Diff line
@@ -80,6 +80,19 @@
	};

	soc {
		romem: nvmem@1fff7800 {
			compatible = "st,stm32f4-otp";
			reg = <0x1fff7800 0x400>;
			#address-cells = <1>;
			#size-cells = <1>;
			ts_cal1: calib@22c {
				reg = <0x22c 0x2>;
			};
			ts_cal2: calib@22e {
				reg = <0x22e 0x2>;
			};
		};

		timer2: timer@40000000 {
			compatible = "st,stm32-timer";
			reg = <0x40000000 0x400>;
+4 −0
Original line number Diff line number Diff line
@@ -102,6 +102,10 @@
	};
};

&rcc {
	compatible = "st,stm32f769-rcc", "st,stm32f746-rcc", "st,stm32-rcc";
};

&cec {
	pinctrl-0 = <&cec_pins_a>;
	pinctrl-names = "default";
+68 −0
Original line number Diff line number Diff line
@@ -188,6 +188,74 @@
				};
			};

			sdmmc1_b4_pins_a: sdmmc1-b4-0 {
				pins {
					pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
						 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
						 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
						 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
						 <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */
						 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
					slew-rate = <3>;
					drive-push-pull;
					bias-disable;
				};
			};

			sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
				pins1 {
					pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
						 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
						 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
						 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
						 <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
					slew-rate = <3>;
					drive-push-pull;
					bias-disable;
				};
				pins2{
					pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
					slew-rate = <3>;
					drive-open-drain;
					bias-disable;
				};
			};

			sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
				pins {
					pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
						 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
						 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
						 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
						 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
						 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
				};
			};

			sdmmc1_dir_pins_a: sdmmc1-dir-0 {
				pins1 {
					pinmux = <STM32_PINMUX('C', 6, AF8)>, /* SDMMC1_D0DIR */
						 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
						 <STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */
					slew-rate = <3>;
					drive-push-pull;
					bias-pull-up;
				};
				pins2{
					pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */
					bias-pull-up;
				};
			};

			sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
				pins {
					pinmux = <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC1_D0DIR */
						 <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
						 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
						 <STM32_PINMUX('B', 8, ANALOG)>; /* SDMMC1_CKIN */
				};
			};

			usart1_pins: usart1@0 {
				pins1 {
					pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
+14 −0
Original line number Diff line number Diff line
@@ -339,6 +339,20 @@
			dma-requests = <32>;
		};

		sdmmc1: sdmmc@52007000 {
			compatible = "arm,pl18x", "arm,primecell";
			arm,primecell-periphid = <0x10153180>;
			reg = <0x52007000 0x1000>;
			interrupts = <49>;
			interrupt-names	= "cmd_irq";
			clocks = <&rcc SDMMC1_CK>;
			clock-names = "apb_pclk";
			resets = <&rcc STM32H7_AHB3_RESET(SDMMC1)>;
			cap-sd-highspeed;
			cap-mmc-highspeed;
			max-frequency = <120000000>;
		};

		exti: interrupt-controller@58000000 {
			compatible = "st,stm32h7-exti";
			interrupt-controller;
Loading